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Diffstat (limited to 'arch/arm64/boot/dts/renesas/r9a09g057.dtsi')
-rw-r--r--arch/arm64/boot/dts/renesas/r9a09g057.dtsi112
1 files changed, 104 insertions, 8 deletions
diff --git a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
index 044f2a22f161..630f7a98df38 100644
--- a/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
+++ b/arch/arm64/boot/dts/renesas/r9a09g057.dtsi
@@ -607,6 +607,102 @@
status = "disabled";
};
+ i3c: i3c@12400000 {
+ compatible = "renesas,r9a09g057-i3c", "renesas,r9a09g047-i3c";
+ reg = <0 0x12400000 0 0x10000>;
+ clocks = <&cpg CPG_MOD 0x91>, <&cpg CPG_MOD 0x92>, <&cpg CPG_MOD 0x90>;
+ clock-names = "pclk", "tclk", "pclkrw";
+ interrupts = <GIC_SPI 674 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 675 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 676 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 677 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 678 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 679 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 680 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 681 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 682 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 689 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 690 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 692 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 693 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 694 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 695 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 696 IRQ_TYPE_LEVEL_HIGH>;
+ interrupt-names = "ierr", "terr", "abort", "resp",
+ "cmd", "ibi", "rx", "tx", "rcv",
+ "st", "sp", "tend", "nack",
+ "al", "tmo", "wu";
+ resets = <&cpg 0x96>, <&cpg 0x97>;
+ reset-names = "presetn", "tresetn";
+ power-domains = <&cpg>;
+ #address-cells = <3>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ rspi0: spi@12800000 {
+ compatible = "renesas,r9a09g057-rspi";
+ reg = <0x0 0x12800000 0x0 0x400>;
+ interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 106 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 107 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 500 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 501 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "idle", "error", "end", "rx", "tx";
+ clocks = <&cpg CPG_MOD 0x54>,
+ <&cpg CPG_MOD 0x55>,
+ <&cpg CPG_MOD 0x56>;
+ clock-names = "pclk", "pclk_sfr", "tclk";
+ resets = <&cpg 0x7b>, <&cpg 0x7c>;
+ reset-names = "presetn", "tresetn";
+ power-domains = <&cpg>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ rspi1: spi@12800400 {
+ compatible = "renesas,r9a09g057-rspi";
+ reg = <0x0 0x12800400 0x0 0x400>;
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 110 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 502 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 503 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "idle", "error", "end", "rx", "tx";
+ clocks = <&cpg CPG_MOD 0x57>,
+ <&cpg CPG_MOD 0x58>,
+ <&cpg CPG_MOD 0x59>;
+ clock-names = "pclk", "pclk_sfr", "tclk";
+ resets = <&cpg 0x7d>, <&cpg 0x7e>;
+ reset-names = "presetn", "tresetn";
+ power-domains = <&cpg>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
+ rspi2: spi@12800800 {
+ compatible = "renesas,r9a09g057-rspi";
+ reg = <0x0 0x12800800 0x0 0x400>;
+ interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>,
+ <GIC_SPI 113 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 504 IRQ_TYPE_EDGE_RISING>,
+ <GIC_SPI 505 IRQ_TYPE_EDGE_RISING>;
+ interrupt-names = "idle", "error", "end", "rx", "tx";
+ clocks = <&cpg CPG_MOD 0x5a>,
+ <&cpg CPG_MOD 0x5b>,
+ <&cpg CPG_MOD 0x5c>;
+ clock-names = "pclk", "pclk_sfr", "tclk";
+ resets = <&cpg 0x7f>, <&cpg 0x80>;
+ reset-names = "presetn", "tresetn";
+ power-domains = <&cpg>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ };
+
i2c0: i2c@14400400 {
compatible = "renesas,riic-r9a09g057";
reg = <0 0x14400400 0 0x400>;
@@ -1020,10 +1116,10 @@
"rx-queue-0", "rx-queue-1", "rx-queue-2",
"rx-queue-3", "tx-queue-0", "tx-queue-1",
"tx-queue-2", "tx-queue-3";
- clocks = <&cpg CPG_MOD 0xbd>, <&cpg CPG_MOD 0xbc>,
- <&cpg CPG_CORE R9A09G057_GBETH_0_CLK_PTP_REF_I>,
- <&cpg CPG_MOD 0xb8>, <&cpg CPG_MOD 0xb9>,
- <&cpg CPG_MOD 0xba>, <&cpg CPG_MOD 0xbb>;
+ clocks = <&cpg CPG_MOD 0xbd>, <&cpg CPG_MOD 0xbc>,
+ <&cpg CPG_CORE R9A09G057_GBETH_0_CLK_PTP_REF_I>,
+ <&cpg CPG_MOD 0xb8>, <&cpg CPG_MOD 0xb9>,
+ <&cpg CPG_MOD 0xba>, <&cpg CPG_MOD 0xbb>;
clock-names = "stmmaceth", "pclk", "ptp_ref",
"tx", "rx", "tx-180", "rx-180";
resets = <&cpg 0xb0>;
@@ -1121,10 +1217,10 @@
"rx-queue-0", "rx-queue-1", "rx-queue-2",
"rx-queue-3", "tx-queue-0", "tx-queue-1",
"tx-queue-2", "tx-queue-3";
- clocks = <&cpg CPG_MOD 0xc3>, <&cpg CPG_MOD 0xc2>,
- <&cpg CPG_CORE R9A09G057_GBETH_1_CLK_PTP_REF_I>,
- <&cpg CPG_MOD 0xbe>, <&cpg CPG_MOD 0xbf>,
- <&cpg CPG_MOD 0xc0>, <&cpg CPG_MOD 0xc1>;
+ clocks = <&cpg CPG_MOD 0xc3>, <&cpg CPG_MOD 0xc2>,
+ <&cpg CPG_CORE R9A09G057_GBETH_1_CLK_PTP_REF_I>,
+ <&cpg CPG_MOD 0xbe>, <&cpg CPG_MOD 0xbf>,
+ <&cpg CPG_MOD 0xc0>, <&cpg CPG_MOD 0xc1>;
clock-names = "stmmaceth", "pclk", "ptp_ref",
"tx", "rx", "tx-180", "rx-180";
resets = <&cpg 0xb1>;