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-rw-r--r--drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c21
1 files changed, 21 insertions, 0 deletions
diff --git a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
index cde13ab647fa..3f894bc85c25 100644
--- a/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
+++ b/drivers/gpu/drm/amd/powerplay/hwmgr/smu7_hwmgr.c
@@ -4977,6 +4977,26 @@ static int smu7_get_power_profile_mode(struct pp_hwmgr *hwmgr, char *buf)
return size;
}
+static void smu7_patch_compute_profile_mode(struct pp_hwmgr *hwmgr,
+ enum PP_SMC_POWER_PROFILE requst)
+{
+ struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
+ uint32_t tmp, level;
+
+ if (requst == PP_SMC_POWER_PROFILE_COMPUTE) {
+ if (data->dpm_level_enable_mask.sclk_dpm_enable_mask) {
+ level = 0;
+ tmp = data->dpm_level_enable_mask.sclk_dpm_enable_mask;
+ while (tmp >>= 1)
+ level++;
+ if (level > 0)
+ smu7_force_clock_level(hwmgr, PP_SCLK, 3 << (level-1));
+ }
+ } else if (hwmgr->power_profile_mode == PP_SMC_POWER_PROFILE_COMPUTE) {
+ smu7_force_clock_level(hwmgr, PP_SCLK, data->dpm_level_enable_mask.sclk_dpm_enable_mask);
+ }
+}
+
static int smu7_set_power_profile_mode(struct pp_hwmgr *hwmgr, long *input, uint32_t size)
{
struct smu7_hwmgr *data = (struct smu7_hwmgr *)(hwmgr->backend);
@@ -5027,6 +5047,7 @@ static int smu7_set_power_profile_mode(struct pp_hwmgr *hwmgr, long *input, uint
data->current_profile_setting.mclk_down_hyst = tmp.mclk_down_hyst;
data->current_profile_setting.mclk_activity = tmp.mclk_activity;
}
+ smu7_patch_compute_profile_mode(hwmgr, mode);
hwmgr->power_profile_mode = mode;
}
break;
> 2020-02-08pipe: use exclusive waits when reading or writingLinus Torvalds4-30/+51 2020-02-08compat_ioctl: fix FIONREAD on devicesArnd Bergmann1-4/+7 2020-02-08net: thunderx: use proper interface type for RGMIITim Harvey1-1/+1 2020-02-08powerpc: Fix CONFIG_TRACE_IRQFLAGS with CONFIG_VMAP_STACKChristophe Leroy1-1/+1 2020-02-08powerpc/futex: Fix incorrect user access blockingMichael Ellerman1-4/+6 2020-02-08irqchip/gic-v3-its: Rename VPENDBASER/VPROPBASER accessorsZenghui Yu3-24/+24 2020-02-08irqchip/gic-v3-its: Remove superfluous WARN_ONZenghui Yu1-1/+0 2020-02-08irqchip/gic-v4.1: Drop 'tmp' in inherit_vpe_l1_table_from_rd()Zenghui Yu1-3/+1 2020-02-08irqchip/gic-v4.1: Ensure L2 vPE table is allocated at RD levelZenghui Yu1-0/+80 2020-02-08irqchip/gic-v4.1: Set vpe_l1_base for all redistributorsZenghui Yu2-2/+5 2020-02-08irqchip/gic-v4.1: Fix programming of GICR_VPROPBASER_4_1_SIZEZenghui Yu1-1/+1 2020-02-08mt76: mt7615: fix max_nss in mt7615_eeprom_parse_hw_capLorenzo Bianconi1-1/+2 2020-02-07bpf: Improve bucket_log calculation logicMartin KaFai Lau1-2/+3