From ee858d83c59d95e08551a9dc270bedca4b72137d Mon Sep 17 00:00:00 2001 From: Eric Biggers Date: Wed, 23 Apr 2025 17:20:37 -0700 Subject: sparc/crc: drop "glue" from filenames The use of the term "glue" in filenames is a Crypto API-ism that rarely shows up elsewhere in lib/ or arch/*/lib/. I think adopting it there was a mistake. The library just uses standard functions, so the amount of code that could be considered "glue" is quite small. And while often the C functions just wrap the assembly functions, there are also cases like crc32c_arch() in arch/x86/lib/crc32-glue.c that blur the line by in-lining the actual implementation into the C function. That's not "glue code", but rather the actual code. Therefore, let's drop "glue" from the filenames and instead use e.g. crc32.c instead of crc32-glue.c. Reviewed-by: "Martin K. Petersen" Acked-by: Ard Biesheuvel Link: https://lore.kernel.org/r/20250424002038.179114-7-ebiggers@kernel.org Signed-off-by: Eric Biggers --- arch/sparc/lib/crc32.c | 93 ++++++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 93 insertions(+) create mode 100644 arch/sparc/lib/crc32.c (limited to 'arch/sparc/lib/crc32.c') diff --git a/arch/sparc/lib/crc32.c b/arch/sparc/lib/crc32.c new file mode 100644 index 000000000000..428fd5588e93 --- /dev/null +++ b/arch/sparc/lib/crc32.c @@ -0,0 +1,93 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* CRC32c (Castagnoli), sparc64 crc32c opcode accelerated + * + * This is based largely upon arch/x86/crypto/crc32c-intel.c + * + * Copyright (C) 2008 Intel Corporation + * Authors: Austin Zhang + * Kent Liu + */ + +#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt + +#include +#include +#include +#include +#include +#include + +static __ro_after_init DEFINE_STATIC_KEY_FALSE(have_crc32c_opcode); + +u32 crc32_le_arch(u32 crc, const u8 *data, size_t len) +{ + return crc32_le_base(crc, data, len); +} +EXPORT_SYMBOL(crc32_le_arch); + +void crc32c_sparc64(u32 *crcp, const u64 *data, size_t len); + +u32 crc32c_arch(u32 crc, const u8 *data, size_t len) +{ + size_t n = -(uintptr_t)data & 7; + + if (!static_branch_likely(&have_crc32c_opcode)) + return crc32c_base(crc, data, len); + + if (n) { + /* Data isn't 8-byte aligned. Align it. */ + n = min(n, len); + crc = crc32c_base(crc, data, n); + data += n; + len -= n; + } + n = len & ~7U; + if (n) { + crc32c_sparc64(&crc, (const u64 *)data, n); + data += n; + len -= n; + } + if (len) + crc = crc32c_base(crc, data, len); + return crc; +} +EXPORT_SYMBOL(crc32c_arch); + +u32 crc32_be_arch(u32 crc, const u8 *data, size_t len) +{ + return crc32_be_base(crc, data, len); +} +EXPORT_SYMBOL(crc32_be_arch); + +static int __init crc32_sparc_init(void) +{ + unsigned long cfr; + + if (!(sparc64_elf_hwcap & HWCAP_SPARC_CRYPTO)) + return 0; + + __asm__ __volatile__("rd %%asr26, %0" : "=r" (cfr)); + if (!(cfr & CFR_CRC32C)) + return 0; + + static_branch_enable(&have_crc32c_opcode); + pr_info("Using sparc64 crc32c opcode optimized CRC32C implementation\n"); + return 0; +} +arch_initcall(crc32_sparc_init); + +static void __exit crc32_sparc_exit(void) +{ +} +module_exit(crc32_sparc_exit); + +u32 crc32_optimizations(void) +{ + if (static_key_enabled(&have_crc32c_opcode)) + return CRC32C_OPTIMIZATION; + return 0; +} +EXPORT_SYMBOL(crc32_optimizations); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("CRC32c (Castagnoli), sparc64 crc32c opcode accelerated"); -- cgit v1.2.3 From 648c7fb16f609c53d2659fefb5088af619485ab4 Mon Sep 17 00:00:00 2001 From: Eric Biggers Date: Fri, 9 May 2025 20:59:59 -0700 Subject: lib/crc: make arch-optimized code use subsys_initcall Make the architecture-optimized CRC code do its CPU feature checks in subsys_initcalls instead of arch_initcalls. This makes it consistent with arch/*/lib/crypto/ and ensures that it runs after initcalls that possibly could be a prerequisite for kernel-mode FPU, such as x86's xfd_update_static_branch() and loongarch's init_euen_mask(). Note: as far as I can tell, x86's xfd_update_static_branch() isn't *actually* needed for kernel-mode FPU. loongarch's init_euen_mask() is needed to enable save/restore of the vector registers, but loongarch doesn't yet have any CRC or crypto code that uses vector registers anyway. Regardless, let's be consistent with arch/*/lib/crypto/ and robust against any potential future dependency on an arch_initcall. Link: https://lore.kernel.org/r/20250510035959.87995-1-ebiggers@kernel.org Signed-off-by: Eric Biggers --- arch/arm/lib/crc-t10dif.c | 2 +- arch/arm/lib/crc32.c | 2 +- arch/arm64/lib/crc-t10dif.c | 2 +- arch/loongarch/lib/crc32-loongarch.c | 2 +- arch/mips/lib/crc32-mips.c | 2 +- arch/powerpc/lib/crc-t10dif.c | 2 +- arch/powerpc/lib/crc32.c | 2 +- arch/sparc/lib/crc32.c | 2 +- arch/x86/lib/crc-t10dif.c | 2 +- arch/x86/lib/crc32.c | 2 +- arch/x86/lib/crc64.c | 2 +- 11 files changed, 11 insertions(+), 11 deletions(-) (limited to 'arch/sparc/lib/crc32.c') diff --git a/arch/arm/lib/crc-t10dif.c b/arch/arm/lib/crc-t10dif.c index 382437094bdd..1093f8ec13b0 100644 --- a/arch/arm/lib/crc-t10dif.c +++ b/arch/arm/lib/crc-t10dif.c @@ -60,7 +60,7 @@ static int __init crc_t10dif_arm_init(void) } return 0; } -arch_initcall(crc_t10dif_arm_init); +subsys_initcall(crc_t10dif_arm_init); static void __exit crc_t10dif_arm_exit(void) { diff --git a/arch/arm/lib/crc32.c b/arch/arm/lib/crc32.c index 7ef7db9c0de7..f2bef8849c7c 100644 --- a/arch/arm/lib/crc32.c +++ b/arch/arm/lib/crc32.c @@ -103,7 +103,7 @@ static int __init crc32_arm_init(void) static_branch_enable(&have_pmull); return 0; } -arch_initcall(crc32_arm_init); +subsys_initcall(crc32_arm_init); static void __exit crc32_arm_exit(void) { diff --git a/arch/arm64/lib/crc-t10dif.c b/arch/arm64/lib/crc-t10dif.c index 99d0b5668a28..c2ffe4fdb59d 100644 --- a/arch/arm64/lib/crc-t10dif.c +++ b/arch/arm64/lib/crc-t10dif.c @@ -61,7 +61,7 @@ static int __init crc_t10dif_arm64_init(void) } return 0; } -arch_initcall(crc_t10dif_arm64_init); +subsys_initcall(crc_t10dif_arm64_init); static void __exit crc_t10dif_arm64_exit(void) { diff --git a/arch/loongarch/lib/crc32-loongarch.c b/arch/loongarch/lib/crc32-loongarch.c index 8e6d1f517e73..b37cd8537b45 100644 --- a/arch/loongarch/lib/crc32-loongarch.c +++ b/arch/loongarch/lib/crc32-loongarch.c @@ -114,7 +114,7 @@ static int __init crc32_loongarch_init(void) static_branch_enable(&have_crc32); return 0; } -arch_initcall(crc32_loongarch_init); +subsys_initcall(crc32_loongarch_init); static void __exit crc32_loongarch_exit(void) { diff --git a/arch/mips/lib/crc32-mips.c b/arch/mips/lib/crc32-mips.c index 84df361e7181..45e4d2c9fbf5 100644 --- a/arch/mips/lib/crc32-mips.c +++ b/arch/mips/lib/crc32-mips.c @@ -163,7 +163,7 @@ static int __init crc32_mips_init(void) static_branch_enable(&have_crc32); return 0; } -arch_initcall(crc32_mips_init); +subsys_initcall(crc32_mips_init); static void __exit crc32_mips_exit(void) { diff --git a/arch/powerpc/lib/crc-t10dif.c b/arch/powerpc/lib/crc-t10dif.c index ddd5c4088f50..4253842cc50d 100644 --- a/arch/powerpc/lib/crc-t10dif.c +++ b/arch/powerpc/lib/crc-t10dif.c @@ -71,7 +71,7 @@ static int __init crc_t10dif_powerpc_init(void) static_branch_enable(&have_vec_crypto); return 0; } -arch_initcall(crc_t10dif_powerpc_init); +subsys_initcall(crc_t10dif_powerpc_init); static void __exit crc_t10dif_powerpc_exit(void) { diff --git a/arch/powerpc/lib/crc32.c b/arch/powerpc/lib/crc32.c index 42f2dd3c85dd..77e5a37006f0 100644 --- a/arch/powerpc/lib/crc32.c +++ b/arch/powerpc/lib/crc32.c @@ -72,7 +72,7 @@ static int __init crc32_powerpc_init(void) static_branch_enable(&have_vec_crypto); return 0; } -arch_initcall(crc32_powerpc_init); +subsys_initcall(crc32_powerpc_init); static void __exit crc32_powerpc_exit(void) { diff --git a/arch/sparc/lib/crc32.c b/arch/sparc/lib/crc32.c index 428fd5588e93..40d4720a42a1 100644 --- a/arch/sparc/lib/crc32.c +++ b/arch/sparc/lib/crc32.c @@ -74,7 +74,7 @@ static int __init crc32_sparc_init(void) pr_info("Using sparc64 crc32c opcode optimized CRC32C implementation\n"); return 0; } -arch_initcall(crc32_sparc_init); +subsys_initcall(crc32_sparc_init); static void __exit crc32_sparc_exit(void) { diff --git a/arch/x86/lib/crc-t10dif.c b/arch/x86/lib/crc-t10dif.c index d073b3678edc..db7ce59c31ac 100644 --- a/arch/x86/lib/crc-t10dif.c +++ b/arch/x86/lib/crc-t10dif.c @@ -29,7 +29,7 @@ static int __init crc_t10dif_x86_init(void) } return 0; } -arch_initcall(crc_t10dif_x86_init); +subsys_initcall(crc_t10dif_x86_init); static void __exit crc_t10dif_x86_exit(void) { diff --git a/arch/x86/lib/crc32.c b/arch/x86/lib/crc32.c index e6a6285cfca8..d09343e2cea9 100644 --- a/arch/x86/lib/crc32.c +++ b/arch/x86/lib/crc32.c @@ -88,7 +88,7 @@ static int __init crc32_x86_init(void) } return 0; } -arch_initcall(crc32_x86_init); +subsys_initcall(crc32_x86_init); static void __exit crc32_x86_exit(void) { diff --git a/arch/x86/lib/crc64.c b/arch/x86/lib/crc64.c index 1214ee726c16..351a09f5813e 100644 --- a/arch/x86/lib/crc64.c +++ b/arch/x86/lib/crc64.c @@ -39,7 +39,7 @@ static int __init crc64_x86_init(void) } return 0; } -arch_initcall(crc64_x86_init); +subsys_initcall(crc64_x86_init); static void __exit crc64_x86_exit(void) { -- cgit v1.2.3