From 2d278488761f0b5be651a3db41e615a964123d6c Mon Sep 17 00:00:00 2001 From: Jouni Högander Date: Tue, 13 May 2025 08:48:13 +0300 Subject: drm/i915/alpm: Make intel_alpm_enable_sink available for PSR MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit We want to enable sink ALPM from PSR code. Make intel_alpm_enable_sink available for PSR. v2: do not add kerneldoc comments Reviewed-by: Suraj Kandpal Signed-off-by: Jouni Högander Link: https://lore.kernel.org/r/20250513054814.3702977-2-jouni.hogander@intel.com --- drivers/gpu/drm/i915/display/intel_alpm.h | 2 ++ 1 file changed, 2 insertions(+) (limited to 'drivers/gpu/drm/i915/display/intel_alpm.h') diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h index d7126d65b60f..c9fe21e3e72c 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.h +++ b/drivers/gpu/drm/i915/display/intel_alpm.h @@ -23,6 +23,8 @@ void intel_alpm_lobf_compute_config(struct intel_dp *intel_dp, struct drm_connector_state *conn_state); void intel_alpm_configure(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state); +void intel_alpm_enable_sink(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state); void intel_alpm_pre_plane_update(struct intel_atomic_state *state, struct intel_crtc *crtc); void intel_alpm_post_plane_update(struct intel_atomic_state *state, -- cgit v1.2.3 From 5d9d4feb33b7d509f8e6f5558381e1e8a3304134 Mon Sep 17 00:00:00 2001 From: Jouni Högander Date: Mon, 26 May 2025 15:05:07 +0300 Subject: drm/i915/alpm: Add new interface to check if AUXLess ALPM is used MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit we need to know if AUXLess ALPM is used when preparing for link training. Add new interface for this and use it in existing code where possible. v2: remove kerneldoc comment Signed-off-by: Jouni Högander Reviewed-by: Ankit Nautiyal Link: https://lore.kernel.org/r/20250526120512.1702815-8-jouni.hogander@intel.com --- drivers/gpu/drm/i915/display/intel_alpm.c | 10 ++++++++-- drivers/gpu/drm/i915/display/intel_alpm.h | 2 ++ 2 files changed, 10 insertions(+), 2 deletions(-) (limited to 'drivers/gpu/drm/i915/display/intel_alpm.h') diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c index 0890247085a7..bbcf510b0c25 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.c +++ b/drivers/gpu/drm/i915/display/intel_alpm.c @@ -26,6 +26,13 @@ bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp) return intel_dp->alpm_dpcd & DP_ALPM_AUX_LESS_CAP; } +bool intel_alpm_is_alpm_aux_less(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state) +{ + return intel_psr_needs_alpm_aux_less(intel_dp, crtc_state) || + (crtc_state->has_lobf && intel_alpm_aux_less_wake_supported(intel_dp)); +} + void intel_alpm_init(struct intel_dp *intel_dp) { u8 dpcd; @@ -341,8 +348,7 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp, * Panel Replay on eDP is always using ALPM aux less. I.e. no need to * check panel support at this point. */ - if ((crtc_state->has_panel_replay && intel_dp_is_edp(intel_dp)) || - (crtc_state->has_lobf && intel_alpm_aux_less_wake_supported(intel_dp))) { + if (intel_alpm_is_alpm_aux_less(intel_dp, crtc_state)) { alpm_ctl = ALPM_CTL_ALPM_ENABLE | ALPM_CTL_ALPM_AUX_LESS_ENABLE | ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS | diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h index c9fe21e3e72c..86f4d5ab1981 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.h +++ b/drivers/gpu/drm/i915/display/intel_alpm.h @@ -32,6 +32,8 @@ void intel_alpm_post_plane_update(struct intel_atomic_state *state, void intel_alpm_lobf_debugfs_add(struct intel_connector *connector); bool intel_alpm_aux_wake_supported(struct intel_dp *intel_dp); bool intel_alpm_aux_less_wake_supported(struct intel_dp *intel_dp); +bool intel_alpm_is_alpm_aux_less(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state); void intel_alpm_disable(struct intel_dp *intel_dp); bool intel_alpm_get_error(struct intel_dp *intel_dp); #endif -- cgit v1.2.3 From 6ecb8e586f8339657211e12fcba7f77bae297fdd Mon Sep 17 00:00:00 2001 From: Jouni Högander Date: Mon, 26 May 2025 15:05:08 +0300 Subject: drm/i915/alpm: Move port alpm configuration MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit It is specified in Bspec where port alpm configuration is supposed to be performed. Change accordingly. v2: - drop HAS reference - ensure PORT_ALPM registers are not writen on older platform Bspec: 68849 Signed-off-by: Jouni Högander Reviewed-by: Ankit Nautiyal Link: https://lore.kernel.org/r/20250526120512.1702815-9-jouni.hogander@intel.com --- drivers/gpu/drm/i915/display/intel_alpm.c | 48 +++++++++++++++++----------- drivers/gpu/drm/i915/display/intel_alpm.h | 2 ++ drivers/gpu/drm/i915/display/intel_cx0_phy.c | 1 + drivers/gpu/drm/i915/display/intel_ddi.c | 6 ++++ 4 files changed, 39 insertions(+), 18 deletions(-) (limited to 'drivers/gpu/drm/i915/display/intel_alpm.h') diff --git a/drivers/gpu/drm/i915/display/intel_alpm.c b/drivers/gpu/drm/i915/display/intel_alpm.c index bbcf510b0c25..dfdde8e4eabe 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.c +++ b/drivers/gpu/drm/i915/display/intel_alpm.c @@ -336,7 +336,6 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp, { struct intel_display *display = to_intel_display(intel_dp); enum transcoder cpu_transcoder = crtc_state->cpu_transcoder; - enum port port = dp_to_dig_port(intel_dp)->base.port; u32 alpm_ctl; if (DISPLAY_VER(display) < 20 || (!intel_psr_needs_alpm(intel_dp, crtc_state) && @@ -368,23 +367,6 @@ static void lnl_alpm_configure(struct intel_dp *intel_dp, pr_alpm_ctl); } - intel_de_write(display, - PORT_ALPM_CTL(port), - PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE | - PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(15) | - PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(0) | - PORT_ALPM_CTL_SILENCE_PERIOD( - intel_dp->alpm_parameters.silence_period_sym_clocks)); - - intel_de_write(display, - PORT_ALPM_LFPS_CTL(port), - PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(10) | - PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION( - intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms) | - PORT_ALPM_LFPS_CTL_FIRST_LFPS_HALF_CYCLE_DURATION( - intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms) | - PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION( - intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms)); } else { alpm_ctl = ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE | ALPM_CTL_EXTENDED_FAST_WAKE_TIME(intel_dp->alpm_parameters.fast_wake_lines); @@ -408,6 +390,36 @@ void intel_alpm_configure(struct intel_dp *intel_dp, intel_dp->alpm_parameters.transcoder = crtc_state->cpu_transcoder; } +void intel_alpm_port_configure(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state) +{ + struct intel_display *display = to_intel_display(intel_dp); + enum port port = dp_to_dig_port(intel_dp)->base.port; + u32 alpm_ctl_val = 0, lfps_ctl_val = 0; + + if (DISPLAY_VER(display) < 20) + return; + + if (intel_alpm_is_alpm_aux_less(intel_dp, crtc_state)) { + alpm_ctl_val = PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE | + PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(15) | + PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(0) | + PORT_ALPM_CTL_SILENCE_PERIOD( + intel_dp->alpm_parameters.silence_period_sym_clocks); + lfps_ctl_val = PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(10) | + PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION( + intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms) | + PORT_ALPM_LFPS_CTL_FIRST_LFPS_HALF_CYCLE_DURATION( + intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms) | + PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION( + intel_dp->alpm_parameters.lfps_half_cycle_num_of_syms); + } + + intel_de_write(display, PORT_ALPM_CTL(port), alpm_ctl_val); + + intel_de_write(display, PORT_ALPM_LFPS_CTL(port), lfps_ctl_val); +} + void intel_alpm_pre_plane_update(struct intel_atomic_state *state, struct intel_crtc *crtc) { diff --git a/drivers/gpu/drm/i915/display/intel_alpm.h b/drivers/gpu/drm/i915/display/intel_alpm.h index 86f4d5ab1981..a861c20b5d79 100644 --- a/drivers/gpu/drm/i915/display/intel_alpm.h +++ b/drivers/gpu/drm/i915/display/intel_alpm.h @@ -27,6 +27,8 @@ void intel_alpm_enable_sink(struct intel_dp *intel_dp, const struct intel_crtc_state *crtc_state); void intel_alpm_pre_plane_update(struct intel_atomic_state *state, struct intel_crtc *crtc); +void intel_alpm_port_configure(struct intel_dp *intel_dp, + const struct intel_crtc_state *crtc_state); void intel_alpm_post_plane_update(struct intel_atomic_state *state, struct intel_crtc *crtc); void intel_alpm_lobf_debugfs_add(struct intel_connector *connector); diff --git a/drivers/gpu/drm/i915/display/intel_cx0_phy.c b/drivers/gpu/drm/i915/display/intel_cx0_phy.c index a82b93cbc81d..91118d115fd3 100644 --- a/drivers/gpu/drm/i915/display/intel_cx0_phy.c +++ b/drivers/gpu/drm/i915/display/intel_cx0_phy.c @@ -10,6 +10,7 @@ #include "i915_reg.h" #include "i915_utils.h" +#include "intel_alpm.h" #include "intel_cx0_phy.h" #include "intel_cx0_phy_regs.h" #include "intel_ddi.h" diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c index 3d47d0ed3c37..f9653fa667b7 100644 --- a/drivers/gpu/drm/i915/display/intel_ddi.c +++ b/drivers/gpu/drm/i915/display/intel_ddi.c @@ -3740,6 +3740,12 @@ static void mtl_ddi_prepare_link_retrain(struct intel_dp *intel_dp, intel_ddi_buf_enable(encoder, intel_dp->DP); intel_dp->DP |= DDI_BUF_CTL_ENABLE; + + /* + * 6.k If AUX-Less ALPM is going to be enabled + * i. Configure PORT_ALPM_CTL and PORT_ALPM_LFPS_CTL here + */ + intel_alpm_port_configure(intel_dp, crtc_state); } static void intel_ddi_prepare_link_retrain(struct intel_dp *intel_dp, -- cgit v1.2.3