From 4e5643468715260209e42b715e8cd9643456d2bd Mon Sep 17 00:00:00 2001 From: Darren Etheridge Date: Fri, 21 Jun 2013 13:52:23 -0500 Subject: drm/tilcdc: adding some more devicetree config Adding support for max-pixelclock and max-width device tree entries. As some devices that use the tilcdc hardware module have restrictions on the allowed/tested values. Also update DT bindings document to reflect new parameters. Signed-off-by: Darren Etheridge Acked-by: Rob Clark Signed-off-by: Dave Airlie --- drivers/gpu/drm/tilcdc/tilcdc_drv.h | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+) (limited to 'drivers/gpu/drm/tilcdc/tilcdc_drv.h') diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.h b/drivers/gpu/drm/tilcdc/tilcdc_drv.h index 090684341fdb..66df316ca434 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.h +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.h @@ -34,6 +34,18 @@ #include #include +/* Defaulting to pixel clock defined on AM335x */ +#define TILCDC_DEFAULT_MAX_PIXELCLOCK 126000 +/* Defaulting to max width as defined on AM335x */ +#define TILCDC_DEFAULT_MAX_WIDTH 2048 +/* + * This may need some tweaking, but want to allow at least 1280x1024@60 + * with optimized DDR & EMIF settings tweaked 1920x1080@24 appears to + * be supportable + */ +#define TILCDC_DEFAULT_MAX_BANDWIDTH (1280*1024*60) + + struct tilcdc_drm_private { void __iomem *mmio; @@ -43,6 +55,16 @@ struct tilcdc_drm_private { /* don't attempt resolutions w/ higher W * H * Hz: */ uint32_t max_bandwidth; + /* + * Pixel Clock will be restricted to some value as + * defined in the device datasheet measured in KHz + */ + uint32_t max_pixelclock; + /* + * Max allowable width is limited on a per device basis + * measured in pixels + */ + uint32_t max_width; /* register contents saved across suspend/resume: */ u32 saved_register[12]; -- cgit v1.2.3