| Age | Commit message (Collapse) | Author | Files | Lines |
|
itc_get_offset() has a consistency check which is no longer valid now that
xtime_lock is a seq_lock. Drop the bogus check.
|
|
Because we're the only platform with seperate in, out, and read
routines, we have to include the file that defines them in our machvec
header so that users of the functions will get the right defines and not
use the non-inline function variants (which are only necessary for
generic kernels).
|
|
The definition of the pal_process_state_info_s structure
misses out some useful pieces (e.g. the "mi" bit which indicates
whether we should call PAL_MC_ERROR_INFO to get more details).
Worse yet, some of the bits are in the wrong places (cc/tc/bc).
See Volume 2 of "Intel Itanium Architecture Software Developer's
Manual". (In the Rev 2.1 October 2002 edition, p. 2:268 and 2:276).
|
|
Another no-brainer bug fix snipped out of the quagmire of
the MCA/TLB patch. This one is for 2.6 only, we must use
the new LOAD_PHYSICAL() macro to get the physical address of
the code label that we want to jump to, the INST_VA_TO_PA()
macro just clears the region bits, which only works for region
7 addresses.
|
|
This bugfix has been hiding inside the MCA TLB patches.
There is an infinite loop in ia64_mca_wakeup_ipi_wait() because
the compiler optimizes away the test at the bottom of the while
loop. It does this because IA64_MCA_WAKEUP_VECTOR is 0xf0, so
irr_bit is known to be the constant 0x30, a.k.a. 48 in decimal.
So when the compiler looks at the expression:
It observes that 1' as unsigned
long.
|
|
Now that it works, we can enable sn2 in generic builds. This should not
only allow generic kernels to work on sn2, but also fix the build
problems people have been seeing with the qla1280 driver. I tested a
generic kernel built with this patch on zx1 and it worked.
|
|
This corrects the save/restore code in mca_asm.S
which was written long ago, before the assembler understood
mnemonic names for 'cr' and 'ar' registers (in fact it
appears to have been written pre-silicon, some of the
control register numbers don't match with what actually
got built). There were other goofs too (like using
0, 1, 2, etc. for region register subscripts).
|
|
Now that the ACPI table parsing stuff has been fixed we can move
find_memory() back where it belongs--after the SRAT table has been
parsed.
|
|
This patch fixes the combination of CONFIG_DISCONTIGMEM and
CONFIG_VIRTUAL_MEM_MAP so that generic kernels will work on all ia64
platforms, including sn2, and also makes sn2 specific kernels work
(which I think is a first).
I've cleaned this patch up heavily based on feedback from yourself,
Christoph and others. I've tested sn2, zx1, and dig (thanks Xavier!)
specific configurations, as well as a generic configuration that allows
the same binary to boot on zx1, dig, and sn2.
|
|
paging_init functions
|
|
This fixes a misnomer of some syscalls in 2.6.0-test[567]. Glibc wants
them without the sys_ infix.
|
|
Patch from Christoph. Fixes interrupt allocation code for sn2.
|
|
This seems to be introduced by recent changes in 2.6.0-test series.
|
|
|
|
GAS_HAS_LOCAL_TAGS was removed a long time ago, but uaccess.h never got
updated. Without this fix, bad syscall args may cause a SEGFAULT instead
of failing gracefully.
|
|
Here is a patch that adds numa support for hugetlb page on ia64. It is
taken from x86 numa implementation. The low level hugetlb page
pre-allocation is done in round robin fashion on each numa node and
allocation for user level code is node local aware.
|
|
n platforms without an SRAT (e.g. zx1), the cpu_to_node_map will get
built incorrectly without this fix, making generic kernels fail when
they try to alloc_pages_node() from a nodeid of -1.
|
|
Small fix to build early_sn_setup even if early printk is turned off.
|
|
I didn't realize that any_online_cpu() wouldn't work for
is_headless_node(), so this patch reverts the function back to using the
node_to_cpu_mask[] array, fixing sn2 for systems with less than 64p.
|
|
Don't try to use the sn2 I/O code if we're not on sn2 or we may get into
trouble. Only makes a difference for generic kernels.
|
|
|
|
I ran into some bugs testing epoll in ia32-emulation mode on ia64.
The attached patch fixes the problems and is well tested.
Here is a summary of the changes:
Changes to sys32_epoll_ctl() and sys32_epoll_wait():
- changed epoll_event32.data to an array (this is subjective, but seems
to make the code more readable)
Changes to sys32_epoll_wait():
- added call to __get_free_pages if kmalloc(epoll_event array) fails. This
provides needed scalability and fixes the -ENOMEM failure during
epoll-pipetest.
- deleted copy-in of epoll_event array since this is not a user-inputsyscall
- changed to check numevents > 0 as indicator of success on call to
sys_epoll_wait.
- changed to loop on numevents not maxevents when copying out to userspace.
|
|
|
|
Replace read/write lock used for HPET timer monotonic_lock with seqlock.
Similar to locking used on xtime and monotonic_lock in timers/timer_tsc.c
|
|
Replace read/write lock used for cyclone timer monotonic_lock with seqlock.
Similar to locking used on xtime and monotonic_lock in timers/timer_tsc.c
|
|
|
|
|
|
|
|
|
|
|
|
breaks everybody else.
Instead, fix the NOMMU case by avoiding the part that walks page
tables.
|
|
|