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| author | Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> | 2023-12-08 22:55:30 +0100 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2023-12-20 12:09:57 +0100 |
| commit | 6b7d9d4c0d496b2a27e7b2d10ec7679116450fbc (patch) | |
| tree | c7bc06c7ff6f834d6691b8535fbd967c4c93aaa0 | |
| parent | dt-bindings: pinctrl: qcom,sm8550-tlmm: restrict number of interrupts (diff) | |
| download | linux-6b7d9d4c0d496b2a27e7b2d10ec7679116450fbc.tar.gz linux-6b7d9d4c0d496b2a27e7b2d10ec7679116450fbc.zip | |
dt-bindings: pinctrl: qcom,sm8650-tlmm: restrict number of interrupts
SM8650 TLMM pin controller comes with only one interrupt, so narrow
the number of interrupts previously defined in common TLMM bindings.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20231208215534.195854-6-krzysztof.kozlowski@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
| -rw-r--r-- | Documentation/devicetree/bindings/pinctrl/qcom,sm8650-tlmm.yaml | 4 |
1 files changed, 3 insertions, 1 deletions
diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,sm8650-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,sm8650-tlmm.yaml index 30432be8fb07..370789ce934b 100644 --- a/Documentation/devicetree/bindings/pinctrl/qcom,sm8650-tlmm.yaml +++ b/Documentation/devicetree/bindings/pinctrl/qcom,sm8650-tlmm.yaml @@ -22,7 +22,9 @@ properties: reg: maxItems: 1 - interrupts: true + interrupts: + maxItems: 1 + interrupt-controller: true "#interrupt-cells": true gpio-controller: true |