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| author | Carolina Jubran <cjubran@nvidia.com> | 2025-07-09 15:41:06 +0300 |
|---|---|---|
| committer | Leon Romanovsky <leon@kernel.org> | 2025-07-13 03:17:30 -0400 |
| commit | cbe080f931f48bc7b054008fc2567d1c8c247a89 (patch) | |
| tree | 8b04de3b8eaef20d3f772b020970d072bef69fb6 | |
| parent | RDMA/mlx5: Fix UMR modifying of mkey page size (diff) | |
| download | linux-cbe080f931f48bc7b054008fc2567d1c8c247a89.tar.gz linux-cbe080f931f48bc7b054008fc2567d1c8c247a89.zip | |
net/mlx5: Expose disciplined_fr_counter through HCA capabilities in mlx5_ifc
Introduce the `disciplined_fr_counter` capability bit to indicate that
the device’s free-running cycle counter is disciplined to real-time.
Signed-off-by: Carolina Jubran <cjubran@nvidia.com>
Reviewed-by: Dragos Tatulea <dtatulea@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/1752064867-16874-2-git-send-email-tariqt@nvidia.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
| -rw-r--r-- | include/linux/mlx5/mlx5_ifc.h | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/include/linux/mlx5/mlx5_ifc.h b/include/linux/mlx5/mlx5_ifc.h index a1bd92ed8f3a..d7684bb28a3a 100644 --- a/include/linux/mlx5/mlx5_ifc.h +++ b/include/linux/mlx5/mlx5_ifc.h @@ -1846,7 +1846,8 @@ struct mlx5_ifc_cmd_hca_cap_bits { u8 log_bf_reg_size[0x5]; - u8 reserved_at_270[0x3]; + u8 disciplined_fr_counter[0x1]; + u8 reserved_at_271[0x2]; u8 qp_error_syndrome[0x1]; u8 reserved_at_274[0x2]; u8 lag_dct[0x2]; |