diff options
| author | Frank Li <Frank.Li@nxp.com> | 2025-07-06 14:47:01 -0400 |
|---|---|---|
| committer | Vladimir Zapolskiy <vz@mleia.com> | 2025-09-11 02:53:59 +0300 |
| commit | 9276abee591ae0a82cc7184653ac8d77d2eb7b88 (patch) | |
| tree | ade53f74d0ee52b004e07ccfc6a33ffa86b90496 /arch/arm/boot/dts/nxp/lpc | |
| parent | ARM: dts: lpc18xx: swap clock-names bic and cui (diff) | |
| download | linux-9276abee591ae0a82cc7184653ac8d77d2eb7b88.tar.gz linux-9276abee591ae0a82cc7184653ac8d77d2eb7b88.zip | |
ARM: dts: lpc: add #address-cells and #size-cells for sram node
Add #address-cells and #size-cells for sram node to fix below DTB_CHECK
warnings:
arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dtb: sram@2,0 (mmio-sram): '#address-cells' is a required property
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Signed-off-by: Vladimir Zapolskiy <vz@mleia.com>
Diffstat (limited to 'arch/arm/boot/dts/nxp/lpc')
| -rw-r--r-- | arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dts | 3 | ||||
| -rw-r--r-- | arch/arm/boot/dts/nxp/lpc/lpc4350.dtsi | 9 | ||||
| -rw-r--r-- | arch/arm/boot/dts/nxp/lpc/lpc4357.dtsi | 9 |
3 files changed, 21 insertions, 0 deletions
diff --git a/arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dts b/arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dts index 8fc89fb6eef1..9d36283efe0f 100644 --- a/arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dts +++ b/arch/arm/boot/dts/nxp/lpc/lpc4350-hitex-eval.dts @@ -406,6 +406,9 @@ ext_sram: sram@2,0 { compatible = "mmio-sram"; reg = <2 0 0x80000>; /* 512 KiB SRAM on IS62WV25616 */ + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 2 0 0x80000>; }; }; }; diff --git a/arch/arm/boot/dts/nxp/lpc/lpc4350.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc4350.dtsi index c4422f587055..707d22a219d8 100644 --- a/arch/arm/boot/dts/nxp/lpc/lpc4350.dtsi +++ b/arch/arm/boot/dts/nxp/lpc/lpc4350.dtsi @@ -24,16 +24,25 @@ sram0: sram@10000000 { compatible = "mmio-sram"; reg = <0x10000000 0x20000>; /* 96 + 32 KiB local SRAM */ + #address-cells = <1>; + #size-cells = <1>; + ranges; }; sram1: sram@10080000 { compatible = "mmio-sram"; reg = <0x10080000 0x12000>; /* 64 + 8 KiB local SRAM */ + #address-cells = <1>; + #size-cells = <1>; + ranges; }; sram2: sram@20000000 { compatible = "mmio-sram"; reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */ + #address-cells = <1>; + #size-cells = <1>; + ranges; }; }; }; diff --git a/arch/arm/boot/dts/nxp/lpc/lpc4357.dtsi b/arch/arm/boot/dts/nxp/lpc/lpc4357.dtsi index 72f12db8d53a..d138ee7869ff 100644 --- a/arch/arm/boot/dts/nxp/lpc/lpc4357.dtsi +++ b/arch/arm/boot/dts/nxp/lpc/lpc4357.dtsi @@ -24,16 +24,25 @@ sram0: sram@10000000 { compatible = "mmio-sram"; reg = <0x10000000 0x8000>; /* 32 KiB local SRAM */ + #address-cells = <1>; + #size-cells = <1>; + ranges; }; sram1: sram@10080000 { compatible = "mmio-sram"; reg = <0x10080000 0xa000>; /* 32 + 8 KiB local SRAM */ + #address-cells = <1>; + #size-cells = <1>; + ranges; }; sram2: sram@20000000 { compatible = "mmio-sram"; reg = <0x20000000 0x10000>; /* 4 x 16 KiB AHB SRAM */ + #address-cells = <1>; + #size-cells = <1>; + ranges; }; }; }; |