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authorPawan Gupta <pawan.kumar.gupta@linux.intel.com>2025-08-14 10:20:43 -0700
committerDave Hansen <dave.hansen@linux.intel.com>2025-08-14 10:38:18 -0700
commitb7cc9887231526ca4fa89f3fa4119e47c2dc7b1e (patch)
tree515fb05671f3c725228463ae988c790aa43e1982 /arch/x86/kernel/cpu/common.c
parentx86/bugs: Move cpu_bugs_smt_update() down (diff)
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x86/vmscape: Warn when STIBP is disabled with SMT
Cross-thread attacks are generally harder as they require the victim to be co-located on a core. However, with VMSCAPE the adversary targets belong to the same guest execution, that are more likely to get co-located. In particular, a thread that is currently executing userspace hypervisor (after the IBPB) may still be targeted by a guest execution from a sibling thread. Issue a warning about the potential risk, except when: - SMT is disabled - STIBP is enabled system-wide - Intel eIBRS is enabled (which implies STIBP protection) Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com> Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Diffstat (limited to 'arch/x86/kernel/cpu/common.c')
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