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| author | Timur Kristóf <timur.kristof@gmail.com> | 2025-08-28 17:11:08 +0200 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2025-09-02 15:55:34 -0400 |
| commit | 9003a0746864f39a0ef72bd45f8e1ad85d930d67 (patch) | |
| tree | f739a07f6ccc13e19bf9c04ee330b9aa8f848f16 /drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h | |
| parent | drm/amd/pm: Adjust si_upload_smc_data register programming (v3) (diff) | |
| download | linux-9003a0746864f39a0ef72bd45f8e1ad85d930d67.tar.gz linux-9003a0746864f39a0ef72bd45f8e1ad85d930d67.zip | |
drm/amd/pm: Treat zero vblank time as too short in si_dpm (v3)
Some parts of the code base expect that MCLK switching is turned
off when the vblank time is set to zero.
According to pp_pm_compute_clocks the non-DC code has issues
with MCLK switching with refresh rates over 120 Hz.
v3:
Add code comment to explain this better.
Add an if statement instead of changing the switch_limit.
Fixes: 841686df9f7d ("drm/amdgpu: add SI DPM support (v4)")
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Timur Kristóf <timur.kristof@gmail.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/amdgpu/amdgpu_mode.h')
0 files changed, 0 insertions, 0 deletions