diff options
| author | Aric Cyr <Aric.Cyr@amd.com> | 2024-12-10 18:38:15 -0500 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2025-01-06 14:44:27 -0500 |
| commit | 787e7be0c9fb1202124dd3f2dea0d39738f91bee (patch) | |
| tree | c0b8ca44eb57fd8d7470521e6ad6876aaa090425 /drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c | |
| parent | drm/amd/display: fix init_adj offset for cositing in SPL (diff) | |
| download | linux-787e7be0c9fb1202124dd3f2dea0d39738f91bee.tar.gz linux-787e7be0c9fb1202124dd3f2dea0d39738f91bee.zip | |
drm/amd/display: Optimize cursor position updates
[why]
Updating the cursor enablement register can be a slow operation and accumulates
when high polling rate cursors cause frequent updates asynchronously to the
cursor position.
[how]
Since the cursor enable bit is cached there is no need to update the
enablement register if there is no change to it. This removes the
read-modify-write from the cursor position programming path in HUBP and
DPP, leaving only the register writes.
Reviewed-by: Josip Pavic <josip.pavic@amd.com>
Signed-off-by: Aric Cyr <Aric.Cyr@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm_helpers.c')
0 files changed, 0 insertions, 0 deletions