drm/amd/display: Flattening core_dc to dc

-Flattening core_dc to dc

Signed-off-by: Bhawanpreet Lakha <Bhawanpreet.Lakha@amd.com>
Reviewed-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

7 files changed, 48 insertions, 95 deletions

diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_dc.h b/drivers/gpu/drm/amd/display/dc/inc/core_dc.h
deleted file mode 100644
index ebe1fd78a92a..000000000000
--- a/drivers/gpu/drm/amd/display/dc/inc/core_dc.h
+++ /dev/null
@@ -1,55 +0,0 @@
-/*
- * core_dc.h
- *
- *  Created on: Nov 13, 2015
- *      Author: yonsun
- */
-
-#ifndef __CORE_DC_H__
-#define __CORE_DC_H__
-
-#include "core_types.h"
-#include "hw_sequencer.h"
-#include "compressor.h"
-
-#define DC_TO_CORE(dc)\
-	container_of(dc, struct core_dc, public)
-
-struct core_dc {
-	struct dc public;
-	struct dc_context *ctx;
-
-	uint8_t link_count;
-	struct dc_link *links[MAX_PIPES * 2];
-
-	struct validate_context *current_context;
-	struct resource_pool *res_pool;
-
-	/* Display Engine Clock levels */
-	struct dm_pp_clock_levels sclk_lvls;
-
-	/* Inputs into BW and WM calculations. */
-	struct bw_calcs_dceip *bw_dceip;
-	struct bw_calcs_vbios *bw_vbios;
-#ifdef CONFIG_DRM_AMD_DC_DCN1_0
-	struct dcn_soc_bounding_box *dcn_soc;
-	struct dcn_ip_params *dcn_ip;
-	struct display_mode_lib dml;
-#endif
-
-	/* HW functions */
-	struct hw_sequencer_funcs hwss;
-	struct dce_hwseq *hwseq;
-
-	/* temp store of dm_pp_display_configuration
-	 * to compare to see if display config changed
-	 */
-	struct dm_pp_display_configuration prev_display_config;
-
-	/* FBC compressor */
-#ifdef ENABLE_FBC
-	struct compressor *fbc_compressor;
-#endif
-};
-
-#endif /* __CORE_DC_H__ */
diff --git a/drivers/gpu/drm/amd/display/dc/inc/core_types.h b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
index 28454028434c..f8ade552c595 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/core_types.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/core_types.h
@@ -52,7 +52,7 @@ void enable_surface_flip_reporting(struct dc_plane_state *plane_state,
 
 /************ link *****************/
 struct link_init_data {
-	const struct core_dc *dc;
+	const struct dc *dc;
 	struct dc_context *ctx; /* TODO: remove 'dal' when DC is complete. */
 	uint32_t connector_index; /* this will be mapped to the HPD pins */
 	uint32_t link_index; /* this is mapped to DAL display_index
@@ -87,19 +87,19 @@ struct resource_funcs {
 	struct link_encoder *(*link_enc_create)(
 			const struct encoder_init_data *init);
 	enum dc_status (*validate_with_context)(
-					const struct core_dc *dc,
+					struct dc *dc,
 					const struct dc_validation_set set[],
 					int set_count,
 					struct validate_context *context,
 					struct validate_context *old_context);
 
 	enum dc_status (*validate_guaranteed)(
-					const struct core_dc *dc,
+					struct dc *dc,
 					struct dc_stream_state *stream,
 					struct validate_context *context);
 
 	bool (*validate_bandwidth)(
-					const struct core_dc *dc,
+					struct dc *dc,
 					struct validate_context *context);
 
 	struct pipe_ctx *(*acquire_idle_pipe_for_layer)(
diff --git a/drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h b/drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h
index 36c48f7d3f56..6a205b010084 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/dce_calcs.h
@@ -33,7 +33,7 @@
 #include "bw_fixed.h"
 
 struct pipe_ctx;
-struct core_dc;
+struct dc;
 struct validate_context;
 struct dce_bw_output;
 
diff --git a/drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h b/drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h
index 7e8abcd60d12..58744fe87ed8 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/dcn_calcs.h
@@ -34,7 +34,7 @@
 #include "display_clock.h"
 #include "../dml/display_mode_lib.h"
 
-struct core_dc;
+struct dc;
 struct validate_context;
 
 /*******************************************************************************
@@ -620,16 +620,16 @@ struct dcn_ip_params {
 extern const struct dcn_ip_params dcn10_ip_defaults;
 
 bool dcn_validate_bandwidth(
-		const struct core_dc *dc,
+		struct dc *dc,
 		struct validate_context *context);
 
 unsigned int dcn_find_dcfclk_suits_all(
-	const struct core_dc *dc,
+	const struct dc *dc,
 	struct clocks_value *clocks);
 
-void dcn_bw_update_from_pplib(struct core_dc *dc);
-void dcn_bw_notify_pplib_of_wm_ranges(struct core_dc *dc);
-void dcn_bw_sync_calcs_and_dml(struct core_dc *dc);
+void dcn_bw_update_from_pplib(struct dc *dc);
+void dcn_bw_notify_pplib_of_wm_ranges(struct dc *dc);
+void dcn_bw_sync_calcs_and_dml(struct dc *dc);
 
 #endif /* __DCN_CALCS_H__ */
 
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h b/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h
index a02f18ae527d..f876a11c903f 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw/mem_input.h
@@ -30,6 +30,7 @@
 
 #include "dml/display_mode_structs.h"
 
+struct dchub_init_data;
 struct cstate_pstate_watermarks_st {
 	uint32_t cstate_exit_ns;
 	uint32_t cstate_enter_plus_exit_ns;
diff --git a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
index 7689e372b9da..c73dca9f6d46 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/hw_sequencer.h
@@ -25,8 +25,10 @@
 
 #ifndef __DC_HW_SEQUENCER_H__
 #define __DC_HW_SEQUENCER_H__
-#include "core_types.h"
-#include "timing_generator.h"
+#include "dc_types.h"
+#include "clock_source.h"
+#include "inc/hw/timing_generator.h"
+#include "core_status.h"
 
 enum pipe_gating_control {
 	PIPE_GATING_CONTROL_DISABLE = 0,
@@ -46,25 +48,31 @@ struct dce_hwseq {
 	struct dce_hwseq_wa wa;
 };
 
+struct pipe_ctx;
+struct validate_context;
+struct dchub_init_data;
+struct dc_static_screen_events;
+struct resource_pool;
+struct resource_context;
 
 struct hw_sequencer_funcs {
 
-	void (*init_hw)(struct core_dc *dc);
+	void (*init_hw)(struct dc *dc);
 
 	enum dc_status (*apply_ctx_to_hw)(
-			struct core_dc *dc, struct validate_context *context);
+			struct dc *dc, struct validate_context *context);
 
 	void (*reset_hw_ctx_wrap)(
-			struct core_dc *dc, struct validate_context *context);
+			struct dc *dc, struct validate_context *context);
 
 	void (*apply_ctx_for_surface)(
-			struct core_dc *dc,
+			struct dc *dc,
 			const struct dc_stream_state *stream,
 			int num_planes,
 			struct validate_context *context);
 
 	void (*set_plane_config)(
-			const struct core_dc *dc,
+			const struct dc *dc,
 			struct pipe_ctx *pipe_ctx,
 			struct resource_context *res_ctx);
 
@@ -77,7 +85,7 @@ struct hw_sequencer_funcs {
 			uint16_t *matrix);
 
 	void (*update_plane_addr)(
-		const struct core_dc *dc,
+		const struct dc *dc,
 		struct pipe_ctx *pipe_ctx);
 
 	void (*update_dchub)(
@@ -95,12 +103,12 @@ struct hw_sequencer_funcs {
 				struct pipe_ctx *pipe_ctx,
 				const struct dc_stream_state *stream);
 
-	void (*power_down)(struct core_dc *dc);
+	void (*power_down)(struct dc *dc);
 
-	void (*enable_accelerated_mode)(struct core_dc *dc);
+	void (*enable_accelerated_mode)(struct dc *dc);
 
 	void (*enable_timing_synchronization)(
-			struct core_dc *dc,
+			struct dc *dc,
 			int group_index,
 			int group_size,
 			struct pipe_ctx *grouped_pipes[]);
@@ -110,14 +118,14 @@ struct hw_sequencer_funcs {
 					bool clock_gating);
 
 	bool (*enable_display_power_gating)(
-					struct core_dc *dc,
+					struct dc *dc,
 					uint8_t controller_id,
 					struct dc_bios *dcb,
 					enum pipe_gating_control power_gating);
 
-	void (*power_down_front_end)(struct core_dc *dc, int fe_idx);
+	void (*power_down_front_end)(struct dc *dc, int fe_idx);
 
-	void (*power_on_front_end)(struct core_dc *dc,
+	void (*power_on_front_end)(struct dc *dc,
 			struct pipe_ctx *pipe,
 			struct validate_context *context);
 
@@ -131,12 +139,12 @@ struct hw_sequencer_funcs {
 			struct dc_link_settings *link_settings);
 
 	void (*pipe_control_lock)(
-				struct core_dc *dc,
+				struct dc *dc,
 				struct pipe_ctx *pipe,
 				bool lock);
 
 	void (*set_bandwidth)(
-			struct core_dc *dc,
+			struct dc *dc,
 			struct validate_context *context,
 			bool decrease_allowed);
 
@@ -152,23 +160,23 @@ struct hw_sequencer_funcs {
 	enum dc_status (*prog_pixclk_crtc_otg)(
 			struct pipe_ctx *pipe_ctx,
 			struct validate_context *context,
-			struct core_dc *dc);
+			struct dc *dc);
 
 	void (*setup_stereo)(
 			struct pipe_ctx *pipe_ctx,
-			struct core_dc *dc);
+			struct dc *dc);
 
 	void (*set_avmute)(struct pipe_ctx *pipe_ctx, bool enable);
 
-	void (*log_hw_state)(struct core_dc *dc);
+	void (*log_hw_state)(struct dc *dc);
 
-	void (*wait_for_mpcc_disconnect)(struct core_dc *dc,
+	void (*wait_for_mpcc_disconnect)(struct dc *dc,
 			struct resource_pool *res_pool,
 			struct pipe_ctx *pipe_ctx);
 };
 
 void color_space_to_black_color(
-	const struct core_dc *dc,
+	const struct dc *dc,
 	enum dc_color_space colorspace,
 	struct tg_color *black_color);
 
diff --git a/drivers/gpu/drm/amd/display/dc/inc/resource.h b/drivers/gpu/drm/amd/display/dc/inc/resource.h
index 7f30d9937d10..13218a52e2fa 100644
--- a/drivers/gpu/drm/amd/display/dc/inc/resource.h
+++ b/drivers/gpu/drm/amd/display/dc/inc/resource.h
@@ -27,7 +27,6 @@
 
 #include "core_types.h"
 #include "core_status.h"
-#include "core_dc.h"
 #include "dal_asic_id.h"
 
 /* TODO unhardcode, 4 for CZ*/
@@ -67,27 +66,27 @@ struct resource_create_funcs {
 
 bool resource_construct(
 	unsigned int num_virtual_links,
-	struct core_dc *dc,
+	struct dc *dc,
 	struct resource_pool *pool,
 	const struct resource_create_funcs *create_funcs);
 
 struct resource_pool *dc_create_resource_pool(
-				struct core_dc *dc,
+				struct dc *dc,
 				int num_virtual_links,
 				enum dce_version dc_version,
 				struct hw_asic_id asic_id);
 
-void dc_destroy_resource_pool(struct core_dc *dc);
+void dc_destroy_resource_pool(struct dc *dc);
 
 enum dc_status resource_map_pool_resources(
-		const struct core_dc *dc,
+		const struct dc *dc,
 		struct validate_context *context,
 		struct validate_context *old_context);
 
 bool resource_build_scaling_params(struct pipe_ctx *pipe_ctx);
 
 enum dc_status resource_build_scaling_params_for_context(
-		const struct core_dc *dc,
+		const struct dc *dc,
 		struct validate_context *context);
 
 void resource_build_info_frame(struct pipe_ctx *pipe_ctx);
@@ -148,12 +147,12 @@ void resource_validate_ctx_update_pointer_after_copy(
 		struct validate_context *dst_ctx);
 
 enum dc_status resource_map_clock_resources(
-		const struct core_dc *dc,
+		const struct dc *dc,
 		struct validate_context *context,
 		struct validate_context *old_context);
 
 enum dc_status resource_map_phy_clock_resources(
-		const struct core_dc *dc,
+		const struct dc *dc,
 		struct validate_context *context,
 		struct validate_context *old_context);