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authorDave Airlie <airlied@redhat.com>2017-03-20 16:49:20 +1000
committerDave Airlie <airlied@redhat.com>2017-03-20 16:49:20 +1000
commit33d5f513c60d5ccd63f8d06d42b4aa4620f4073f (patch)
tree2b239c98e87098487f07bcac0a1ef381faec4449 /drivers/gpu/drm/drm_fourcc.c
parentdrm/nouveau/secboot: fix NULL pointer dereference (diff)
parentdrm/imx: Remove unneeded definition for structure imx_drm_component (diff)
downloadlinux-33d5f513c60d5ccd63f8d06d42b4aa4620f4073f.tar.gz
linux-33d5f513c60d5ccd63f8d06d42b4aa4620f4073f.zip
Merge tag 'imx-drm-next-2017-03-17' of git://git.pengutronix.de/git/pza/linux into drm-next
imx-drm PRE/PRG support, deferred plane disabling, separate alpha support - Initial support for the Prefetch Resolve Engine/Gasket on i.MX6QP, improving linear scanout buffer memory bandwidth utilization. This will in the future grow reordering support and allow direct scanout of Vivante tiled renderbuffers from the GPU. - Deferred plane disabling gets rid of some busy waiting in the atomic plane disable and crtc disable paths that lead to wait_for_vblank timeouts. - Add support for RGBA formats with a separate alpha plane, that can reduce memory bandwidth utilization for mostly transparent overlay planes by skipping color reads for completely transparent regions. - Allow moving an active overlay plane without enforcing a modeset. - Add 8-bit and 16-bit bayer formats to ipu_cpmem_set_image. - Set the base address in ipu_cpmem_set_image even for invalid formats to increase robustness against errors. - Use drm_plane_helper_check_state in plane atomic_check. - Some cleanup. * tag 'imx-drm-next-2017-03-17' of git://git.pengutronix.de/git/pza/linux: (22 commits) drm/imx: Remove unneeded definition for structure imx_drm_component drm/imx: use PRG/PRE when possible drm/imx: enable/disable PRG on CRTC enable/disable gpu: ipu-v3: only set non-zero AXI ID for IC when PRG is absent gpu: ipu-v3: hook up PRG unit gpu: ipu-v3: document valid IPUv3 compatibles and extend for i.MX6 QuadPlus gpu: ipu-v3: add driver for Prefetch Resolve Gasket gpu: ipu-v3: add DT binding for the Prefetch Resolve Gasket gpu: ipu-v3: add driver for Prefetch Resolve Engine gpu: ipu-v3: add DT binding for the Prefetch Resolve Engine drm/imx: ipuv3-plane: add support for separate alpha planes drm/imx: extend drm_plane_state_to_eba for separate channel support gpu: ipu-v3: add support for separate alpha channels drm: add RGB formats with separate alpha plane drm/imx: add deferred plane disabling drm/imx: don't wait for vblank and stop calling cleanup_planes in commit_tail gpu: ipu-v3: add unsynchronised DP channel disabling gpu: ipu-v3: remove IRQ dance on DC channel disable gpu: ipu-cpmem: add bayer formats to ipu_cpmem_set_image gpu: ipu-cpmem: set image base address even for incorrect formats ...
Diffstat (limited to 'drivers/gpu/drm/drm_fourcc.c')
-rw-r--r--drivers/gpu/drm/drm_fourcc.c8
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/gpu/drm/drm_fourcc.c b/drivers/gpu/drm/drm_fourcc.c
index 90d2cc8da8eb..92bf3306d4b3 100644
--- a/drivers/gpu/drm/drm_fourcc.c
+++ b/drivers/gpu/drm/drm_fourcc.c
@@ -132,6 +132,8 @@ const struct drm_format_info *__drm_format_info(u32 format)
{ .format = DRM_FORMAT_XBGR8888, .depth = 24, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 },
{ .format = DRM_FORMAT_RGBX8888, .depth = 24, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 },
{ .format = DRM_FORMAT_BGRX8888, .depth = 24, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 },
+ { .format = DRM_FORMAT_RGB565_A8, .depth = 24, .num_planes = 2, .cpp = { 2, 1, 0 }, .hsub = 1, .vsub = 1 },
+ { .format = DRM_FORMAT_BGR565_A8, .depth = 24, .num_planes = 2, .cpp = { 2, 1, 0 }, .hsub = 1, .vsub = 1 },
{ .format = DRM_FORMAT_XRGB2101010, .depth = 30, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 },
{ .format = DRM_FORMAT_XBGR2101010, .depth = 30, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 },
{ .format = DRM_FORMAT_RGBX1010102, .depth = 30, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 },
@@ -144,6 +146,12 @@ const struct drm_format_info *__drm_format_info(u32 format)
{ .format = DRM_FORMAT_ABGR8888, .depth = 32, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 },
{ .format = DRM_FORMAT_RGBA8888, .depth = 32, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 },
{ .format = DRM_FORMAT_BGRA8888, .depth = 32, .num_planes = 1, .cpp = { 4, 0, 0 }, .hsub = 1, .vsub = 1 },
+ { .format = DRM_FORMAT_RGB888_A8, .depth = 32, .num_planes = 2, .cpp = { 3, 1, 0 }, .hsub = 1, .vsub = 1 },
+ { .format = DRM_FORMAT_BGR888_A8, .depth = 32, .num_planes = 2, .cpp = { 3, 1, 0 }, .hsub = 1, .vsub = 1 },
+ { .format = DRM_FORMAT_XRGB8888_A8, .depth = 32, .num_planes = 2, .cpp = { 4, 1, 0 }, .hsub = 1, .vsub = 1 },
+ { .format = DRM_FORMAT_XBGR8888_A8, .depth = 32, .num_planes = 2, .cpp = { 4, 1, 0 }, .hsub = 1, .vsub = 1 },
+ { .format = DRM_FORMAT_RGBX8888_A8, .depth = 32, .num_planes = 2, .cpp = { 4, 1, 0 }, .hsub = 1, .vsub = 1 },
+ { .format = DRM_FORMAT_BGRX8888_A8, .depth = 32, .num_planes = 2, .cpp = { 4, 1, 0 }, .hsub = 1, .vsub = 1 },
{ .format = DRM_FORMAT_YUV410, .depth = 0, .num_planes = 3, .cpp = { 1, 1, 1 }, .hsub = 4, .vsub = 4 },
{ .format = DRM_FORMAT_YVU410, .depth = 0, .num_planes = 3, .cpp = { 1, 1, 1 }, .hsub = 4, .vsub = 4 },
{ .format = DRM_FORMAT_YUV411, .depth = 0, .num_planes = 3, .cpp = { 1, 1, 1 }, .hsub = 4, .vsub = 1 },