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authorImre Deak <imre.deak@intel.com>2024-04-17 01:10:02 +0300
committerImre Deak <imre.deak@intel.com>2024-04-19 17:05:36 +0300
commit1ff65bf8ffc16e0a85728412a035f04247761a26 (patch)
tree2bb677ad04fb401532a3152aa66d761436ab1c1e /drivers/gpu/drm/i915/display/intel_dp_mst.c
parentdrm/i915/dp_mst: Fix symbol clock when calculating the DSC DPT bpp limit (diff)
downloadlinux-1ff65bf8ffc16e0a85728412a035f04247761a26.tar.gz
linux-1ff65bf8ffc16e0a85728412a035f04247761a26.zip
drm/i915/dp_mst: Fix BW limit check when calculating DSC DPT bpp
The DSC DPT bpp limit check should only fail if the available DPT BW is less than the required BW, fix the check accordingly. Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20240416221010.376865-4-imre.deak@intel.com
Diffstat (limited to 'drivers/gpu/drm/i915/display/intel_dp_mst.c')
-rw-r--r--drivers/gpu/drm/i915/display/intel_dp_mst.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 196eeead8cf0..58eb6bf33c92 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -60,7 +60,7 @@ static int intel_dp_mst_check_constraints(struct drm_i915_private *i915, int bpp
int output_bpp = bpp;
int symbol_clock = intel_dp_link_symbol_clock(crtc_state->port_clock);
- if (output_bpp * adjusted_mode->crtc_clock >=
+ if (output_bpp * adjusted_mode->crtc_clock >
symbol_clock * 72) {
drm_dbg_kms(&i915->drm, "UHBR check failed(required bw %d available %d)\n",
output_bpp * adjusted_mode->crtc_clock, symbol_clock * 72);