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| author | Dave Airlie <airlied@redhat.com> | 2025-06-27 09:57:43 +1000 |
|---|---|---|
| committer | Dave Airlie <airlied@redhat.com> | 2025-06-27 09:58:05 +1000 |
| commit | f41830c57bb8e70e283b9db251c95f1270a8279d (patch) | |
| tree | a35c093992319992949074c8adf627fb9a4e1eec /drivers/gpu/drm/panfrost/panfrost_drv.c | |
| parent | Merge tag 'drm-intel-next-2025-06-18' of https://gitlab.freedesktop.org/drm/i... (diff) | |
| parent | drm/nouveau/disp: Use dev->dev to get the device (diff) | |
| download | linux-f41830c57bb8e70e283b9db251c95f1270a8279d.tar.gz linux-f41830c57bb8e70e283b9db251c95f1270a8279d.zip | |
Merge tag 'drm-misc-next-2025-06-26' of https://gitlab.freedesktop.org/drm/misc/kernel into drm-next
drm-misc-next for 6.17:
UAPI Changes:
Cross-subsystem Changes:
Core Changes:
- ci: Add Device tree validation and kunit
- connector: Move HDR sink metadat to drm_display_info
Driver Changes:
- bochs: drm_panic Support
- panfrost: MT8370 Support
- bridge:
- tc358767: Convert to devm_drm_bridge_alloc()
Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Maxime Ripard <mripard@redhat.com>
Link: https://lore.kernel.org/r/20250626-sincere-loon-of-effort-6dbdf9@houat
Diffstat (limited to 'drivers/gpu/drm/panfrost/panfrost_drv.c')
| -rw-r--r-- | drivers/gpu/drm/panfrost/panfrost_drv.c | 61 |
1 files changed, 33 insertions, 28 deletions
diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c index 842239b43cdf..1ea6c509a5d5 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -866,6 +866,8 @@ static const struct panfrost_compatible amlogic_data = { .vendor_quirk = panfrost_gpu_amlogic_quirk, }; +static const char * const mediatek_pm_domains[] = { "core0", "core1", "core2", + "core3", "core4" }; /* * The old data with two power supplies for MT8183 is here only to * keep retro-compatibility with older devicetrees, as DVFS will @@ -874,51 +876,53 @@ static const struct panfrost_compatible amlogic_data = { * On new devicetrees please use the _b variant with a single and * coupled regulators instead. */ -static const char * const mediatek_mt8183_supplies[] = { "mali", "sram", NULL }; -static const char * const mediatek_mt8183_pm_domains[] = { "core0", "core1", "core2" }; +static const char * const legacy_supplies[] = { "mali", "sram", NULL }; static const struct panfrost_compatible mediatek_mt8183_data = { - .num_supplies = ARRAY_SIZE(mediatek_mt8183_supplies) - 1, - .supply_names = mediatek_mt8183_supplies, - .num_pm_domains = ARRAY_SIZE(mediatek_mt8183_pm_domains), - .pm_domain_names = mediatek_mt8183_pm_domains, + .num_supplies = ARRAY_SIZE(legacy_supplies) - 1, + .supply_names = legacy_supplies, + .num_pm_domains = 3, + .pm_domain_names = mediatek_pm_domains, }; -static const char * const mediatek_mt8183_b_supplies[] = { "mali", NULL }; static const struct panfrost_compatible mediatek_mt8183_b_data = { - .num_supplies = ARRAY_SIZE(mediatek_mt8183_b_supplies) - 1, - .supply_names = mediatek_mt8183_b_supplies, - .num_pm_domains = ARRAY_SIZE(mediatek_mt8183_pm_domains), - .pm_domain_names = mediatek_mt8183_pm_domains, + .num_supplies = ARRAY_SIZE(default_supplies) - 1, + .supply_names = default_supplies, + .num_pm_domains = 3, + .pm_domain_names = mediatek_pm_domains, .pm_features = BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), }; -static const char * const mediatek_mt8186_pm_domains[] = { "core0", "core1" }; static const struct panfrost_compatible mediatek_mt8186_data = { - .num_supplies = ARRAY_SIZE(mediatek_mt8183_b_supplies) - 1, - .supply_names = mediatek_mt8183_b_supplies, - .num_pm_domains = ARRAY_SIZE(mediatek_mt8186_pm_domains), - .pm_domain_names = mediatek_mt8186_pm_domains, + .num_supplies = ARRAY_SIZE(default_supplies) - 1, + .supply_names = default_supplies, + .num_pm_domains = 2, + .pm_domain_names = mediatek_pm_domains, .pm_features = BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), }; -/* MT8188 uses the same power domains and power supplies as MT8183 */ static const struct panfrost_compatible mediatek_mt8188_data = { - .num_supplies = ARRAY_SIZE(mediatek_mt8183_b_supplies) - 1, - .supply_names = mediatek_mt8183_b_supplies, - .num_pm_domains = ARRAY_SIZE(mediatek_mt8183_pm_domains), - .pm_domain_names = mediatek_mt8183_pm_domains, + .num_supplies = ARRAY_SIZE(default_supplies) - 1, + .supply_names = default_supplies, + .num_pm_domains = 3, + .pm_domain_names = mediatek_pm_domains, .pm_features = BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), .gpu_quirks = BIT(GPU_QUIRK_FORCE_AARCH64_PGTABLE), }; -static const char * const mediatek_mt8192_supplies[] = { "mali", NULL }; -static const char * const mediatek_mt8192_pm_domains[] = { "core0", "core1", "core2", - "core3", "core4" }; static const struct panfrost_compatible mediatek_mt8192_data = { - .num_supplies = ARRAY_SIZE(mediatek_mt8192_supplies) - 1, - .supply_names = mediatek_mt8192_supplies, - .num_pm_domains = ARRAY_SIZE(mediatek_mt8192_pm_domains), - .pm_domain_names = mediatek_mt8192_pm_domains, + .num_supplies = ARRAY_SIZE(default_supplies) - 1, + .supply_names = default_supplies, + .num_pm_domains = 5, + .pm_domain_names = mediatek_pm_domains, + .pm_features = BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), + .gpu_quirks = BIT(GPU_QUIRK_FORCE_AARCH64_PGTABLE), +}; + +static const struct panfrost_compatible mediatek_mt8370_data = { + .num_supplies = ARRAY_SIZE(default_supplies) - 1, + .supply_names = default_supplies, + .num_pm_domains = 2, + .pm_domain_names = mediatek_pm_domains, .pm_features = BIT(GPU_PM_CLK_DIS) | BIT(GPU_PM_VREG_OFF), .gpu_quirks = BIT(GPU_QUIRK_FORCE_AARCH64_PGTABLE), }; @@ -945,6 +949,7 @@ static const struct of_device_id dt_match[] = { { .compatible = "mediatek,mt8186-mali", .data = &mediatek_mt8186_data }, { .compatible = "mediatek,mt8188-mali", .data = &mediatek_mt8188_data }, { .compatible = "mediatek,mt8192-mali", .data = &mediatek_mt8192_data }, + { .compatible = "mediatek,mt8370-mali", .data = &mediatek_mt8370_data }, { .compatible = "allwinner,sun50i-h616-mali", .data = &allwinner_h616_data }, {} }; |
