media: iris: Set platform capabilities to firmware for encoder video device

Initialize and configure platform-specific capabilities for the encoder
in the firmware during stream-on, to tailor encoding behavior to the
current session's requirements. Some of these capabilities can also be
updated dynamically when V4L2 controls are modified by the client after
stream-on.

Tested-by: Vikash Garodia <quic_vgarodia@quicinc.com> # X1E80100
Reviewed-by: Vikash Garodia <quic_vgarodia@quicinc.com>
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8550-HDK
Tested-by: Neil Armstrong <neil.armstrong@linaro.org> # on SM8650-HDK
Signed-off-by: Dikshita Agarwal <quic_dikshita@quicinc.com>
Tested-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org> # x1e80100-crd
Signed-off-by: Bryan O'Donoghue <bod@kernel.org>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>

1 files changed, 23 insertions, 0 deletions

diff --git a/drivers/media/platform/qcom/iris/iris_platform_gen2.c b/drivers/media/platform/qcom/iris/iris_platform_gen2.c
index 0bd7b1826e1d..faec2e6b3405 100644
--- a/drivers/media/platform/qcom/iris/iris_platform_gen2.c
+++ b/drivers/media/platform/qcom/iris/iris_platform_gen2.c
@@ -215,6 +215,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.value = V4L2_MPEG_VIDEO_H264_PROFILE_HIGH,
 		.hfi_id = HFI_PROP_PROFILE,
 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
+		.set = iris_set_profile,
 	},
 	{
 		.cap_id = PROFILE_HEVC,
@@ -226,6 +227,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.value = V4L2_MPEG_VIDEO_HEVC_PROFILE_MAIN,
 		.hfi_id = HFI_PROP_PROFILE,
 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
+		.set = iris_set_profile,
 	},
 	{
 		.cap_id = LEVEL_H264,
@@ -252,6 +254,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.value = V4L2_MPEG_VIDEO_H264_LEVEL_5_0,
 		.hfi_id = HFI_PROP_LEVEL,
 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
+		.set = iris_set_level,
 	},
 	{
 		.cap_id = LEVEL_HEVC,
@@ -273,6 +276,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.value = V4L2_MPEG_VIDEO_HEVC_LEVEL_5,
 		.hfi_id = HFI_PROP_LEVEL,
 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
+		.set = iris_set_level,
 	},
 	{
 		.cap_id = STAGE,
@@ -281,6 +285,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.step_or_mask = 1,
 		.value = STAGE_2,
 		.hfi_id = HFI_PROP_STAGE,
+		.set = iris_set_stage,
 	},
 	{
 		.cap_id = HEADER_MODE,
@@ -291,6 +296,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.value = V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
 		.hfi_id = HFI_PROP_SEQ_HEADER_MODE,
 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
+		.set = iris_set_header_mode_gen2,
 	},
 	{
 		.cap_id = PREPEND_SPSPPS_TO_IDR,
@@ -308,6 +314,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.hfi_id = HFI_PROP_TOTAL_BITRATE,
 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
 			CAP_FLAG_DYNAMIC_ALLOWED,
+		.set = iris_set_bitrate,
 	},
 	{
 		.cap_id = BITRATE_PEAK,
@@ -318,6 +325,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.hfi_id = HFI_PROP_TOTAL_PEAK_BITRATE,
 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
 			CAP_FLAG_DYNAMIC_ALLOWED,
+		.set = iris_set_peak_bitrate,
 	},
 	{
 		.cap_id = BITRATE_MODE,
@@ -328,6 +336,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.value = V4L2_MPEG_VIDEO_BITRATE_MODE_VBR,
 		.hfi_id = HFI_PROP_RATE_CONTROL,
 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
+		.set = iris_set_bitrate_mode_gen2,
 	},
 	{
 		.cap_id = FRAME_SKIP_MODE,
@@ -355,6 +364,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.hfi_id = HFI_PROP_MAX_GOP_FRAMES,
 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
 			CAP_FLAG_DYNAMIC_ALLOWED,
+		.set = iris_set_u32,
 	},
 	{
 		.cap_id = ENTROPY_MODE,
@@ -365,6 +375,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.value = V4L2_MPEG_VIDEO_H264_ENTROPY_MODE_CABAC,
 		.hfi_id = HFI_PROP_CABAC_SESSION,
 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_MENU,
+		.set = iris_set_entropy_mode_gen2,
 	},
 	{
 		.cap_id = MIN_FRAME_QP_H264,
@@ -374,6 +385,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.value = MIN_QP_8BIT,
 		.hfi_id = HFI_PROP_MIN_QP_PACKED,
 		.flags = CAP_FLAG_OUTPUT_PORT,
+		.set = iris_set_min_qp,
 	},
 	{
 		.cap_id = MIN_FRAME_QP_HEVC,
@@ -383,6 +395,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.value = MIN_QP_8BIT,
 		.hfi_id = HFI_PROP_MIN_QP_PACKED,
 		.flags = CAP_FLAG_OUTPUT_PORT,
+		.set = iris_set_min_qp,
 	},
 	{
 		.cap_id = MAX_FRAME_QP_H264,
@@ -392,6 +405,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.value = MAX_QP,
 		.hfi_id = HFI_PROP_MAX_QP_PACKED,
 		.flags = CAP_FLAG_OUTPUT_PORT,
+		.set = iris_set_max_qp,
 	},
 	{
 		.cap_id = MAX_FRAME_QP_HEVC,
@@ -401,6 +415,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.value = MAX_QP,
 		.hfi_id = HFI_PROP_MAX_QP_PACKED,
 		.flags = CAP_FLAG_OUTPUT_PORT,
+		.set = iris_set_max_qp,
 	},
 	{
 		.cap_id = I_FRAME_MIN_QP_H264,
@@ -495,6 +510,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.hfi_id = HFI_PROP_QP_PACKED,
 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
 			CAP_FLAG_DYNAMIC_ALLOWED,
+		.set = iris_set_frame_qp,
 	},
 	{
 		.cap_id = I_FRAME_QP_HEVC,
@@ -505,6 +521,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.hfi_id = HFI_PROP_QP_PACKED,
 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
 			CAP_FLAG_DYNAMIC_ALLOWED,
+		.set = iris_set_frame_qp,
 	},
 	{
 		.cap_id = P_FRAME_QP_H264,
@@ -515,6 +532,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.hfi_id = HFI_PROP_QP_PACKED,
 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
 			CAP_FLAG_DYNAMIC_ALLOWED,
+		.set = iris_set_frame_qp,
 	},
 	{
 		.cap_id = P_FRAME_QP_HEVC,
@@ -525,6 +543,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.hfi_id = HFI_PROP_QP_PACKED,
 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
 			CAP_FLAG_DYNAMIC_ALLOWED,
+		.set = iris_set_frame_qp,
 	},
 	{
 		.cap_id = B_FRAME_QP_H264,
@@ -535,6 +554,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.hfi_id = HFI_PROP_QP_PACKED,
 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
 			CAP_FLAG_DYNAMIC_ALLOWED,
+		.set = iris_set_frame_qp,
 	},
 	{
 		.cap_id = B_FRAME_QP_HEVC,
@@ -545,6 +565,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.hfi_id = HFI_PROP_QP_PACKED,
 		.flags = CAP_FLAG_OUTPUT_PORT | CAP_FLAG_INPUT_PORT |
 			CAP_FLAG_DYNAMIC_ALLOWED,
+		.set = iris_set_frame_qp,
 	},
 	{
 		.cap_id = INPUT_BUF_HOST_MAX_COUNT,
@@ -554,6 +575,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.value = DEFAULT_MAX_HOST_BUF_COUNT,
 		.hfi_id = HFI_PROP_BUFFER_HOST_MAX_COUNT,
 		.flags = CAP_FLAG_INPUT_PORT,
+		.set = iris_set_u32,
 	},
 	{
 		.cap_id = OUTPUT_BUF_HOST_MAX_COUNT,
@@ -563,6 +585,7 @@ static struct platform_inst_fw_cap inst_fw_cap_sm8550_enc[] = {
 		.value = DEFAULT_MAX_HOST_BUF_COUNT,
 		.hfi_id = HFI_PROP_BUFFER_HOST_MAX_COUNT,
 		.flags = CAP_FLAG_OUTPUT_PORT,
+		.set = iris_set_u32,
 	},
 };