Merge branch 'pci/controller/dwc'

- Move struct dwc_pcie_vsec_id to include/linux/pcie-dwc.h, where it can be
  shared by debugfs, perf, sysfs, etc (Manivannan Sadhasivam)

- Add dw_pcie_find_vsec_capability() to locate Vendor Specific Extended
  Capabilities (Shradha Todi)

- Add debugfs-based Silicon Debug, Error Injection, Statistical Counter
  support for DWC (Shradha Todi)

- Add debugfs property to expose LTSSM status of DWC PCIe link (Hans Zhang)

- Add Rockchip Vendor ID and Vendor Specific ID of RAS DES Capability so
  the DWC debugfs features work for Rockchip as well (Niklas Cassel)

* pci/controller/dwc:
  PCI: dw-rockchip: Hide broken ATS capability for RK3588 running in EP mode
  PCI: dwc: ep: Add dw_pcie_ep_hide_ext_capability()
  PCI: dwc: ep: Return -ENOMEM for allocation failures
  PCI: dwc: Add Rockchip to the RAS DES allowed vendor list
  PCI: Add Rockchip Vendor ID
  PCI: dwc: Add debugfs property to provide LTSSM status of the PCIe link
  PCI: dwc: Add debugfs based Statistical Counter support for DWC
  PCI: dwc: Add debugfs based Error Injection support for DWC
  PCI: dwc: Add debugfs based Silicon Debug support for DWC
  PCI: dwc: Add helper to find the Vendor Specific Extended Capability (VSEC)
  perf/dwc_pcie: Move common DWC struct definitions to 'pcie-dwc.h'

1 files changed, 4 insertions, 0 deletions

diff --git a/drivers/pci/controller/dwc/pcie-designware-host.c b/drivers/pci/controller/dwc/pcie-designware-host.c
index ffaded8f2df7..6501fb062c70 100644
--- a/drivers/pci/controller/dwc/pcie-designware-host.c
+++ b/drivers/pci/controller/dwc/pcie-designware-host.c
@@ -548,6 +548,8 @@ int dw_pcie_host_init(struct dw_pcie_rp *pp)
 	if (pp->ops->post_init)
 		pp->ops->post_init(pp);
 
+	dwc_pcie_debugfs_init(pci);
+
 	return 0;
 
 err_stop_link:
@@ -572,6 +574,8 @@ void dw_pcie_host_deinit(struct dw_pcie_rp *pp)
 {
 	struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
 
+	dwc_pcie_debugfs_deinit(pci);
+
 	pci_stop_root_bus(pp->bridge->bus);
 	pci_remove_root_bus(pp->bridge->bus);