diff options
| author | Bjorn Helgaas <bhelgaas@google.com> | 2023-10-28 13:31:05 -0500 |
|---|---|---|
| committer | Bjorn Helgaas <bhelgaas@google.com> | 2023-10-28 13:31:05 -0500 |
| commit | 5897c174028a6a05169b6ecdbcd20fe4d1a8bcda (patch) | |
| tree | 184ebbe7e6fff66e04d53bbc416ecde1f538612f /drivers/pci/controller/pci-mvebu.c | |
| parent | Merge branch 'pci/config-errs' (diff) | |
| parent | PCI/portdrv: Use FIELD_GET() (diff) | |
| download | linux-5897c174028a6a05169b6ecdbcd20fe4d1a8bcda.tar.gz linux-5897c174028a6a05169b6ecdbcd20fe4d1a8bcda.zip | |
Merge branch 'pci/field-get'
- Use FIELD_GET()/FIELD_PREP() when possible throughout drivers/pci/ (Ilpo
Järvinen, Bjorn Helgaas)
- Rework DPC control programming for clarity (Ilpo Järvinen)
* pci/field-get:
PCI/portdrv: Use FIELD_GET()
PCI/VC: Use FIELD_GET()
PCI/PTM: Use FIELD_GET()
PCI/PME: Use FIELD_GET()
PCI/ATS: Use FIELD_GET()
PCI/ATS: Show PASID Capability register width in bitmasks
PCI: Use FIELD_GET() in Sapphire RX 5600 XT Pulse quirk
PCI: Use FIELD_GET()
PCI/MSI: Use FIELD_GET/PREP()
PCI/DPC: Use defines with DPC reason fields
PCI/DPC: Use defined fields with DPC_CTL register
PCI/DPC: Use FIELD_GET()
PCI: hotplug: Use FIELD_GET/PREP()
PCI: dwc: Use FIELD_GET/PREP()
PCI: cadence: Use FIELD_GET()
PCI: Use FIELD_GET() to extract Link Width
PCI: mvebu: Use FIELD_PREP() with Link Width
PCI: tegra194: Use FIELD_GET()/FIELD_PREP() with Link Width fields
# Conflicts:
# drivers/pci/controller/dwc/pcie-tegra194.c
Diffstat (limited to 'drivers/pci/controller/pci-mvebu.c')
| -rw-r--r-- | drivers/pci/controller/pci-mvebu.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c index 60810a1fbfb7..29fe09c99e7d 100644 --- a/drivers/pci/controller/pci-mvebu.c +++ b/drivers/pci/controller/pci-mvebu.c @@ -264,7 +264,7 @@ static void mvebu_pcie_setup_hw(struct mvebu_pcie_port *port) */ lnkcap = mvebu_readl(port, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP); lnkcap &= ~PCI_EXP_LNKCAP_MLW; - lnkcap |= (port->is_x4 ? 4 : 1) << 4; + lnkcap |= FIELD_PREP(PCI_EXP_LNKCAP_MLW, port->is_x4 ? 4 : 1); mvebu_writel(port, lnkcap, PCIE_CAP_PCIEXP + PCI_EXP_LNKCAP); /* Disable Root Bridge I/O space, memory space and bus mastering. */ |
