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| author | Gayatri Kammela <gayatri.kammela@intel.com> | 2021-08-16 09:58:32 -0700 |
|---|---|---|
| committer | Hans de Goede <hdegoede@redhat.com> | 2021-08-20 20:33:35 +0200 |
| commit | ee7e89ff80063616c7f81b97ce7d38733019531a (patch) | |
| tree | cd22fc855f067609c48f1be4841579387fc8f844 /drivers/platform/x86/intel/pmc/core.h | |
| parent | platform/x86/intel: pmc/core: Add Alderlake support to pmc core driver (diff) | |
| download | linux-ee7e89ff80063616c7f81b97ce7d38733019531a.tar.gz linux-ee7e89ff80063616c7f81b97ce7d38733019531a.zip | |
platform/x86/intel: pmc/core: Add Latency Tolerance Reporting (LTR) support to Alder Lake
Add support to show the Latency Tolerance Reporting for the IPs on
the Alder Lake PCH as reported by the PMC. This LTR support on
Alder Lake is slightly different from the Cannon lake PCH that is being
reused by all platforms till Tiger Lake.
Cc: Chao Qin <chao.qin@intel.com>
Cc: Srinivas Pandruvada <srinivas.pandruvada@intel.com>
Cc: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Cc: David Box <david.e.box@intel.com>
Tested-by: You-Sheng Yang <vicamo.yang@canonical.com>
Acked-by: Rajneesh Bhardwaj <irenic.rajneesh@gmail.com>
Reviewed-by: Hans de Goede <hdegoede@redhat.com>
Reviewed-by: Andy Shevchenko <andy.shevchenko@gmail.com>
Signed-off-by: Gayatri Kammela <gayatri.kammela@intel.com>
Link: https://lore.kernel.org/r/5ca3ea090b53a9bf918b055447ab5c8ef2925cc4.1629091915.git.gayatri.kammela@intel.com
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Diffstat (limited to 'drivers/platform/x86/intel/pmc/core.h')
| -rw-r--r-- | drivers/platform/x86/intel/pmc/core.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/platform/x86/intel/pmc/core.h b/drivers/platform/x86/intel/pmc/core.h index 8972363b57b4..6863f4de3070 100644 --- a/drivers/platform/x86/intel/pmc/core.h +++ b/drivers/platform/x86/intel/pmc/core.h @@ -199,6 +199,8 @@ enum ppfear_regs { #define TGL_NUM_IP_IGN_ALLOWED 23 #define TGL_PMC_LPM_RES_COUNTER_STEP_X2 61 /* 30.5us * 2 */ +#define ADL_PMC_LTR_SPF 0x1C00 +#define ADL_NUM_IP_IGN_ALLOWED 23 #define ADL_PMC_SLP_S0_RES_COUNTER_OFFSET 0x1098 /* |