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| author | Pinkesh Vaghela <pinkesh.vaghela@einfochips.com> | 2025-08-25 18:54:23 +0530 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2025-09-25 08:29:05 +0200 |
| commit | faaf0ea59713732b66100d8b5440fe40e48b3847 (patch) | |
| tree | c047b01aed38d3f5dac8392df05878f15f953ff1 /scripts/generate_rust_analyzer.py | |
| parent | dt-bindings: riscv: Add SiFive P550 CPU compatible (diff) | |
| download | linux-faaf0ea59713732b66100d8b5440fe40e48b3847.tar.gz linux-faaf0ea59713732b66100d8b5440fe40e48b3847.zip | |
riscv: Add Kconfig option for ESWIN platforms
Create a config option to build ESWIN SoC specific resources
Signed-off-by: Pinkesh Vaghela <pinkesh.vaghela@einfochips.com>
Reviewed-by: Samuel Holland <samuel.holland@sifive.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20250825132427.1618089-3-pinkesh.vaghela@einfochips.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'scripts/generate_rust_analyzer.py')
0 files changed, 0 insertions, 0 deletions