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| author | Laura Nao <laura.nao@collabora.com> | 2025-09-15 17:19:24 +0200 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2025-09-21 09:33:45 -0700 |
| commit | 516edf79a5c6af2ce862e83a34c9d9d74770ac93 (patch) | |
| tree | 7bd71f7269421ce88bd4b9d5fb5c20810aede921 /scripts/lib/kdoc/kdoc_parser.py | |
| parent | clk: mediatek: clk-mux: Add ops for mux gates with set/clr/upd and FENC (diff) | |
| download | linux-516edf79a5c6af2ce862e83a34c9d9d74770ac93.tar.gz linux-516edf79a5c6af2ce862e83a34c9d9d74770ac93.zip | |
clk: mediatek: clk-mtk: Introduce mtk_clk_get_hwv_regmap()
On MT8196, some clock controllers use a separate regmap for hardware
voting via set/clear/status registers. Add mtk_clk_get_hwv_regmap() to
retrieve this optional regmap, avoiding duplicated lookup code in
mtk_clk_register_muxes() and mtk_clk_register_gate().
Reviewed-by: Nícolas F. R. A. Prado <nfraprado@collabora.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Laura Nao <laura.nao@collabora.com>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'scripts/lib/kdoc/kdoc_parser.py')
0 files changed, 0 insertions, 0 deletions