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| author | Taniya Das <quic_tdas@quicinc.com> | 2024-06-12 16:38:23 +0530 |
|---|---|---|
| committer | Bjorn Andersson <andersson@kernel.org> | 2024-06-23 17:14:04 -0500 |
| commit | 955606a7b073d724a50a6ab1119987e189fc3e36 (patch) | |
| tree | 80aa7038aa829d2f5f54fafa8b9a4c985c78a624 /scripts | |
| parent | clk: qcom: gcc-sa8775p: Update the GDSC wait_val fields and flags (diff) | |
| download | linux-955606a7b073d724a50a6ab1119987e189fc3e36.tar.gz linux-955606a7b073d724a50a6ab1119987e189fc3e36.zip | |
clk: qcom: gcc-sa8775p: Set FORCE_MEM_CORE_ON for gcc_ufs_phy_ice_core_clk
Update the force mem core bit for UFS ICE clock to force the core on
signal to remain active during halt state of the clk. If force mem
core bit of the clock is not set, the memories of the subsystem will
not retain the logic across power states.
Fixes: 08c51ceb12f7 ("clk: qcom: add the GCC driver for sa8775p")
Signed-off-by: Taniya Das <quic_tdas@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20240612-sa8775p-v2-gcc-gpucc-fixes-v2-3-adcc756a23df@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Diffstat (limited to 'scripts')
0 files changed, 0 insertions, 0 deletions