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| author | Sascha Bischoff <Sascha.Bischoff@arm.com> | 2026-05-06 09:37:23 +0000 |
|---|---|---|
| committer | Thomas Gleixner <tglx@kernel.org> | 2026-05-11 14:56:04 +0200 |
| commit | eb6f6d523813ead9dc2799194a2839d42c049734 (patch) | |
| tree | b84b294286958bf7dba288c7eaef8f605aa8b53f /tools/perf/scripts/python/export-to-postgresql.py | |
| parent | dec85d2fbd20de3711a71e65397dfdb40c3fa953 (diff) | |
| download | linux-eb6f6d523813ead9dc2799194a2839d42c049734.tar.gz linux-eb6f6d523813ead9dc2799194a2839d42c049734.zip | |
irqchip/gic-v5: Support range allocation for LPIs
The per-IPI parent allocation loop returns immediately on failure and leaks
any parent interrupts allocated by earlier iterations.
The GICv5 LPI domain now owns LPI allocation and teardown internally,
but its irq_domain callbacks still reject requests where nr_irqs is
greater than one. This forces child domains to allocate and free LPIs
one at a time even when the interrupt core requests a contiguous
range.
Handle multi-interrupt allocation and teardown in the LPI domain by
iterating over the requested range and unwinding any partially
allocated state on failure.
Allocate the parent LPIs for the IPI domain with a single range
request as well, which cures the leakage problem.
Fixes: 0f0101325876 ("irqchip/gic-v5: Add GICv5 LPI/IPI support")
Signed-off-by: Sascha Bischoff <sascha.bischoff@arm.com>
Signed-off-by: Thomas Gleixner <tglx@kernel.org>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Reviewed-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Cc: stable@vger.kernel.org
Link: https://patch.msgid.link/20260506093634.382062-3-sascha.bischoff@arm.com
Diffstat (limited to 'tools/perf/scripts/python/export-to-postgresql.py')
0 files changed, 0 insertions, 0 deletions
