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| author | Conor Dooley <conor.dooley@microchip.com> | 2026-01-20 18:15:42 +0000 |
|---|---|---|
| committer | Linus Walleij <linusw@kernel.org> | 2026-01-21 13:13:37 +0100 |
| commit | 488d704ed7b7e7afeef24ee846c8223b607357b7 (patch) | |
| tree | 2689b74ce7bd3d5ddd811109aa48626d9b3bc7e9 /tools/perf/scripts/python/stackcollapse.py | |
| parent | 6b324d199467bf346132f0cb7f5ad4bbcdc3c037 (diff) | |
| download | linux-488d704ed7b7e7afeef24ee846c8223b607357b7.tar.gz linux-488d704ed7b7e7afeef24ee846c8223b607357b7.zip | |
pinctrl: add polarfire soc mssio pinctrl driver
On Polarfire SoC, the Bank 2 and Bank 4 IOs connected to the
Multiprocessor Subsystem (MSS) are controlled by IOMUX_CRs 1 through 6,
which determine what function in routed to them, and
MSSIO_BANK#_IO_CFG_CRs, which determine the configuration of each pin.
Add a driver for this pin controller, including several custom
properties that reflect aspects of the MSS's configuration.
Reuse the Kconfig option for iomux0, since controlling MSSIOs without
iomux0 routing a function to the MSSIOs in question is pointless, and
routing a function to the MSSIOs is equally unhelpful if none of them
are configured to make use of that function.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions
