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| author | Alexander Shishkin <alexander.shishkin@linux.intel.com> | 2015-09-08 14:03:55 +0300 |
|---|---|---|
| committer | Alexander Shishkin <alexander.shishkin@linux.intel.com> | 2017-03-15 14:55:17 +0200 |
| commit | 5118ccd34780f4637a9360be580f41f4c1feab48 (patch) | |
| tree | cbaaab3dd9fd9860bdbb5de5e3d07d75a487e946 /tools/perf/scripts/python/stackcollapse.py | |
| parent | intel_th: Don't leak module refcount on failure to activate (diff) | |
| download | linux-5118ccd34780f4637a9360be580f41f4c1feab48.tar.gz linux-5118ccd34780f4637a9360be580f41f4c1feab48.zip | |
intel_th: pci: Add Denverton SOC support
This adds Intel(R) Trace Hub PCI ID for Denverton SOC.
Signed-off-by: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions