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| author | Krishna Manikandan <mkrishn@codeaurora.org> | 2020-07-16 17:05:32 +0530 |
|---|---|---|
| committer | Bjorn Andersson <bjorn.andersson@linaro.org> | 2020-09-10 21:42:59 +0000 |
| commit | 81921a37145e0c6581ab913129c3c2a604704eee (patch) | |
| tree | 8638bd0e914b8937506ac8a446490c961ee71c7a /tools/perf/scripts/python/stackcollapse.py | |
| parent | arm64: dts: qcom: sc7180: Add LPASS clock controller nodes (diff) | |
| download | linux-81921a37145e0c6581ab913129c3c2a604704eee.tar.gz linux-81921a37145e0c6581ab913129c3c2a604704eee.zip | |
arm64: dts: qcom: sc7180: add interconnect bindings for display
This change adds the interconnect bindings to the
MDSS node. This will establish Display to DDR path
for bus bandwidth voting.
Reviewed-by: Rob Clark <robdclark@chromium.org>
Signed-off-by: Krishna Manikandan <mkrishn@codeaurora.org>
Link: https://lore.kernel.org/r/1594899334-19772-1-git-send-email-kalyan_t@codeaurora.org
Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions