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| author | Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com> | 2026-01-20 09:22:50 -0800 |
|---|---|---|
| committer | Linus Walleij <linusw@kernel.org> | 2026-01-21 13:11:56 +0100 |
| commit | 84a3bc337378385ed9c9cef06910587de7accf0b (patch) | |
| tree | b4b207bc652e6a9f1552cad8ad33e1f650649dad /tools/perf/scripts/python/stackcollapse.py | |
| parent | 450e2487d5a28260f70ad7fbf3060e7f8304203d (diff) | |
| download | linux-84a3bc337378385ed9c9cef06910587de7accf0b.tar.gz linux-84a3bc337378385ed9c9cef06910587de7accf0b.zip | |
dt-bindings: pinctrl: qcom,glymur-tlmm: Document Mahua TLMM block
Document the pinctrl compatible for the Mahua SoC, a 12-core variant
of Glymur. The PDC wake IRQ map differs since PDC handles the interrupt
for GPIO 155 instead of GPIO 143 as seen on Glymur.
Signed-off-by: Gopikrishna Garmidi <gopikrishna.garmidi@oss.qualcomm.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@oss.qualcomm.com>
Signed-off-by: Linus Walleij <linusw@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions