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| author | Sathishkumar S <sathishkumar.sundararaju@amd.com> | 2025-02-18 23:35:42 +0530 |
|---|---|---|
| committer | Alex Deucher <alexander.deucher@amd.com> | 2025-02-25 11:44:00 -0500 |
| commit | 9b71be8785e2849cd82b6aeab642b60cd6577966 (patch) | |
| tree | f899a1ba6b566b6381c50dab75f17394c419a45e /tools/perf/scripts/python/stackcollapse.py | |
| parent | da120ed561e2f47556f63638842e6d6ddb8d8216 (diff) | |
| download | linux-9b71be8785e2849cd82b6aeab642b60cd6577966.tar.gz linux-9b71be8785e2849cd82b6aeab642b60cd6577966.zip | |
drm/amdgpu: Add core reset registers for JPEG5_0_1
Add core reset control register definitions and align
all prior register definitions to end at 100 column
length for uniformity.
Signed-off-by: Sathishkumar S <sathishkumar.sundararaju@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions