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| author | Samuel Holland <samuel@sholland.org> | 2021-11-18 22:35:43 -0600 |
|---|---|---|
| committer | Maxime Ripard <maxime@cerno.tech> | 2021-11-23 10:29:05 +0100 |
| commit | b30fc68e6ce543130cfcf69fb02bafbcf961a7d4 (patch) | |
| tree | e5fb5b105fdf91768d819d7011bd6885c32dc724 /tools/perf/scripts/python/stackcollapse.py | |
| parent | clk: sunxi-ng: mux: Add macros using clk_parent_data and clk_hw (diff) | |
| download | linux-b30fc68e6ce543130cfcf69fb02bafbcf961a7d4.tar.gz linux-b30fc68e6ce543130cfcf69fb02bafbcf961a7d4.zip | |
clk: sunxi-ng: gate: Add macros for gates with fixed dividers
It is possible to declare a gate with a fixed divider, by using the
CCU_FEATURE_ALL_PREDIV flag. Since this is not obvious, add a macro
for declaring this type of clock.
Signed-off-by: Samuel Holland <samuel@sholland.org>
Signed-off-by: Maxime Ripard <maxime@cerno.tech>
Link: https://lore.kernel.org/r/20211119043545.4010-6-samuel@sholland.org
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions