diff options
| author | AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com> | 2023-02-06 11:01:02 +0100 |
|---|---|---|
| committer | Stephen Boyd <sboyd@kernel.org> | 2023-03-13 11:46:35 -0700 |
| commit | f222a1baec5f2f1f1d494589a74646d1411dd8ce (patch) | |
| tree | 52ffea502a2a090362a7a723941a158867a8e841 /tools/perf/scripts/python/stackcollapse.py | |
| parent | dt-bindings: clock: mediatek,mt8186-fhctl: Support MT6795, MT8173/92/95 (diff) | |
| download | linux-f222a1baec5f2f1f1d494589a74646d1411dd8ce.tar.gz linux-f222a1baec5f2f1f1d494589a74646d1411dd8ce.zip | |
clk: mediatek: mt6795: Add support for frequency hopping through FHCTL
Add FHCTL parameters and register PLLs through FHCTL to add support
for frequency hopping and SSC. FHCTL will be enabled only on PLLs
specified in devicetree.
This commit brings functional changes only upon addition of
devicetree configuration.
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20230206100105.861720-5-angelogioacchino.delregno@collabora.com
Reviewed-by: Chen-Yu Tsai <wenst@chromium.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions