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| author | Clément Péron <peron.clem@gmail.com> | 2018-10-09 13:28:37 +0200 |
|---|---|---|
| committer | Dinh Nguyen <dinguyen@kernel.org> | 2018-11-28 09:18:36 -0600 |
| commit | f6628486c8489e91c513b62608f89ccdb745600d (patch) | |
| tree | 52a0e74f47f2c8072ba9b01c8994122cddb34447 /tools/perf/scripts/python/stackcollapse.py | |
| parent | Linux 4.20-rc1 (diff) | |
| download | linux-f6628486c8489e91c513b62608f89ccdb745600d.tar.gz linux-f6628486c8489e91c513b62608f89ccdb745600d.zip | |
ARM: debug: enable UART1 for socfpga Cyclone5
Cyclone5 and Arria10 doesn't have the same memory map for UART1.
Split the SOCFPGA_UART1 into 2 options to allow debugging on UART1 for Cyclone5.
Signed-off-by: Clément Péron <peron.clem@gmail.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions