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| author | Benjamin Gaignard <benjamin.gaignard@collabora.com> | 2025-12-09 11:34:17 +0100 |
|---|---|---|
| committer | Hans Verkuil <hverkuil+cisco@kernel.org> | 2026-01-05 15:56:31 +0100 |
| commit | cb3f945c012ab152fd2323e0df34c2b640071738 (patch) | |
| tree | b2c46fca8c5a9b3600b0e7a77031397c2794e76c /tools/perf/scripts/python | |
| parent | e0f99b810e1181374370f91cd996d761549e147f (diff) | |
| download | linux-cb3f945c012ab152fd2323e0df34c2b640071738.tar.gz linux-cb3f945c012ab152fd2323e0df34c2b640071738.zip | |
media: verisilicon: AV1: Fix tx mode bit setting
AV1 specification describes 3 possibles tx modes: 4x4 only, largest and
select. The hardware allows 5 possibles tx modes: 4x4 only, 8x8, 16x16,
32x32 and select. Since the both aren't exactly matching we need to add
a mapping function to set the correct mode on hardware.
Signed-off-by: Benjamin Gaignard <benjamin.gaignard@collabora.com>
Fixes: 727a400686a2c ("media: verisilicon: Add Rockchip AV1 decoder")
Cc: stable@vger.kernel.org
Signed-off-by: Nicolas Dufresne <nicolas.dufresne@collabora.com>
Signed-off-by: Hans Verkuil <hverkuil+cisco@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python')
0 files changed, 0 insertions, 0 deletions