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authorGeert Uytterhoeven <geert+renesas@glider.be>2022-02-08 09:50:03 +0100
committerGeert Uytterhoeven <geert+renesas@glider.be>2022-02-08 09:50:03 +0100
commitfbf4ae93c2bca96035b2c36f408b0616403ede10 (patch)
tree497b39b3754dc4f344312fb4f2208e38e9505da4 /tools/perf/util/scripting-engines/trace-event-python.c
parentdt-bindings: clock: renesas: Document RZ/V2L SoC (diff)
parentdt-bindings: clock: Add R9A07G054 CPG Clock and Reset Definitions (diff)
downloadlinux-fbf4ae93c2bca96035b2c36f408b0616403ede10.tar.gz
linux-fbf4ae93c2bca96035b2c36f408b0616403ede10.zip
Merge tag 'renesas-r9a07g054-dt-binding-defs-tag' into renesas-clk-for-v5.18
Renesas RZ/V2L DT Binding Definitions Clock definitions for the Renesas RZ/V2L (R9A07G054) SoC, shared by driver and DT source files.
Diffstat (limited to 'tools/perf/util/scripting-engines/trace-event-python.c')
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