diff options
| author | Ian Rogers <irogers@google.com> | 2023-02-22 21:53:05 -0800 |
|---|---|---|
| committer | Arnaldo Carvalho de Melo <acme@redhat.com> | 2023-02-27 18:41:49 -0300 |
| commit | b42d103bc02de484dc4aefe457ffcc35637b6754 (patch) | |
| tree | 24a83c6fead726d6960aa8b8aec33088a283bf27 /tools | |
| parent | perf vendor events intel: Update alderlake to v1.19 (diff) | |
| download | linux-b42d103bc02de484dc4aefe457ffcc35637b6754.tar.gz linux-b42d103bc02de484dc4aefe457ffcc35637b6754.zip | |
perf vendor events intel: Update alderlaken to v1.19
Update alderlaken perf json from v1.18 to v1.19.
Based on:
https://github.com/intel/perfmon/pull/58
perf JSON files created using:
https://github.com/intel/perfmon/blob/main/scripts/create_perf_json.py
Signed-off-by: Ian Rogers <irogers@google.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Edward Baker <edward.baker@intel.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Xing Zhengjun <zhengjun.xing@linux.intel.com>
Link: https://lore.kernel.org/r/20230223055306.296179-3-irogers@google.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Diffstat (limited to 'tools')
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/alderlaken/memory.json | 7 | ||||
| -rw-r--r-- | tools/perf/pmu-events/arch/x86/mapfile.csv | 2 |
2 files changed, 8 insertions, 1 deletions
diff --git a/tools/perf/pmu-events/arch/x86/alderlaken/memory.json b/tools/perf/pmu-events/arch/x86/alderlaken/memory.json index f84bf8c43495..37259d38a222 100644 --- a/tools/perf/pmu-events/arch/x86/alderlaken/memory.json +++ b/tools/perf/pmu-events/arch/x86/alderlaken/memory.json @@ -14,6 +14,13 @@ "UMask": "0xf4" }, { + "BriefDescription": "Counts the number of cycles that the head (oldest load) of the load buffer and retirement are both stalled due to a DL1 miss.", + "EventCode": "0x05", + "EventName": "LD_HEAD.L1_MISS_AT_RET", + "SampleAfterValue": "1000003", + "UMask": "0x81" + }, + { "BriefDescription": "Counts the number of cycles that the head (oldest load) of the load buffer and retirement are both stalled due to other block cases.", "EventCode": "0x05", "EventName": "LD_HEAD.OTHER_AT_RET", diff --git a/tools/perf/pmu-events/arch/x86/mapfile.csv b/tools/perf/pmu-events/arch/x86/mapfile.csv index e69b29123327..1c5776e37120 100644 --- a/tools/perf/pmu-events/arch/x86/mapfile.csv +++ b/tools/perf/pmu-events/arch/x86/mapfile.csv @@ -1,6 +1,6 @@ Family-model,Version,Filename,EventType GenuineIntel-6-(97|9A|B7|BA|BF),v1.19,alderlake,core -GenuineIntel-6-BE,v1.18,alderlaken,core +GenuineIntel-6-BE,v1.19,alderlaken,core GenuineIntel-6-(1C|26|27|35|36),v4,bonnell,core GenuineIntel-6-(3D|47),v26,broadwell,core GenuineIntel-6-56,v7,broadwellde,core |