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path: root/drivers/clk/renesas
AgeCommit message (Expand)AuthorLines
2026-02-21Convert 'alloc_flex' family to use the new default GFP_KERNEL argumentLinus Torvalds-3/+3
2026-02-21Convert 'alloc_obj' family to use the new default GFP_KERNEL argumentLinus Torvalds-32/+32
2026-02-21treewide: Replace kmalloc with kmalloc_obj for non-scalar typesKees Cook-35/+35
2026-01-16clk: renesas: Add missing log message terminatorsGeert Uytterhoeven-9/+9
2026-01-16clk: renesas: rzg2l: Remove DSI clock rate restrictionsChris Brandt-31/+143
2026-01-09clk: renesas: rzv2h: Deassert reset on assert timeoutBiju Das-4/+5
2026-01-09clk: renesas: rzg2l: Deassert reset on assert timeoutBiju Das-4/+5
2026-01-09clk: renesas: cpg-mssr: Unlock before reset verificationLad Prabhakar-3/+3
2026-01-09clk: renesas: r9a09g056: Add entries for CANFDLad Prabhakar-0/+10
2026-01-09clk: renesas: r9a09g057: Add entries for CANFDLad Prabhakar-0/+10
2026-01-09clk: renesas: r9a09g077: Add CANFD clocksLad Prabhakar-1/+12
2026-01-09clk: renesas: cpg-mssr: Handle RZ/T2H register layout in PM callbacksCosmin Tanislav-5/+21
2026-01-08clk: renesas: cpg-mssr: Simplify pointer math in cpg_rzt2h_mstp_read()Cosmin Tanislav-14/+6
2025-12-29clk: renesas: r9a09g056: Add clock and reset entries for TSUOvidiu Panait-0/+6
2025-12-23clk: renesas: r9a09g057: Add entries for RSCIsLad Prabhakar-0/+126
2025-12-23clk: renesas: r9a09g056: Add entries for RSCIsLad Prabhakar-0/+126
2025-12-15clk: renesas: r9a09g056: Add entries for the RSPIsLad Prabhakar-0/+24
2025-12-15clk: renesas: r9a09g056: Add entries for ICULad Prabhakar-0/+3
2025-12-15clk: renesas: r9a09g056: Add entries for the DMACsLad Prabhakar-0/+19
2025-12-15clk: renesas: r9a09g077: Propagate rate changes through mux parentsLad Prabhakar-1/+1
2025-12-15clk: renesas: r9a09g077: Add xSPI core and module clocksLad Prabhakar-3/+190
2025-12-15clk: renesas: rzg2l: Select correct div round macroChris Brandt-2/+2
2025-12-15clk: renesas: rzg2l: Fix intin variable sizeChris Brandt-1/+1
2025-12-08Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/cl...Linus Torvalds-71/+1102
2025-11-24clk: renesas: Use bitfield helpersGeert Uytterhoeven-19/+11
2025-11-13clk: renesas: r9a09g077: Add SPI module clocksCosmin Tanislav-1/+21
2025-11-13clk: renesas: r9a09g056: Add USB3.0 clocks/resetsLad Prabhakar-1/+8
2025-11-13clk: renesas: r9a09g057: Add USB3.0 clocks/resetsLad Prabhakar-1/+15
2025-11-13clk: renesas: r9a09g047: Add RSCI clocks/resetsBiju Das-0/+126
2025-11-12clk: renesas: r9a06g032: Fix memory leak in error pathHaotian Zhang-3/+3
2025-11-12clk: renesas: r9a09g077: Use devm_ helpers for divider clock registrationLad Prabhakar-14/+16
2025-11-12clk: renesas: r9a09g077: Remove stray blank lineLad Prabhakar-1/+0
2025-11-12clk: renesas: r9a09g077: Propagate rate changes to parent clocksLad Prabhakar-2/+2
2025-11-12clk: renesas: r8a779a0: Add 3DGE module clockNiklas Söderlund-0/+1
2025-11-10clk: renesas: r8a779a0: Add ZG Core clockNiklas Söderlund-1/+5
2025-11-10clk: renesas: rcar-gen4: Add support for clock dividers in FRQCRBNiklas Söderlund-2/+7
2025-10-27clk: renesas: r9a09g056: Add clock and reset entries for ISPLad Prabhakar-0/+14
2025-10-27clk: renesas: r9a09g056: Add support for PLLVDO, CRU clocks, and resetsLad Prabhakar-0/+31
2025-10-27clk: renesas: r9a09g056: Add clocks and resets for DSI and LCDC modulesLad Prabhakar-0/+64
2025-10-27clk: renesas: r9a09g077: Add TSU module clockCosmin Tanislav-0/+1
2025-10-27clk: renesas: r9a09g057: Add clock and reset entries for DSI and LCDCLad Prabhakar-0/+65
2025-10-27Merge tag 'clk-renesas-rzv2h-plldsi-tag' into renesas-clk-for-v6.19Geert Uytterhoeven-11/+527
2025-10-27clk: renesas: rzv2h: Add support for DSI clocksLad Prabhakar-2/+514
2025-10-27clk: renesas: rzv2h: Use GENMASK for PLL fieldsLad Prabhakar-7/+8
2025-10-27clk: renesas: rzv2h: Add instance field to struct pllLad Prabhakar-4/+7
2025-10-23clk: renesas: r9a09g057: Add clock and reset entries for RTCOvidiu Panait-0/+4
2025-10-23clk: renesas: cpg-mssr: Spelling s/offets/offsets/Geert Uytterhoeven-1/+1
2025-10-23clk: renesas: r9a09g057: Add clock and reset entries for TSUOvidiu Panait-0/+6
2025-10-23clk: renesas: cpg-mssr: Add read-back and delay handling for RZ/T2H MSTPLad Prabhakar-2/+13
2025-10-20clk: renesas: cpg-mssr: Add module reset support for RZ/T2HLad Prabhakar-4/+107