summaryrefslogtreecommitdiffstats
path: root/drivers/cxl/Kconfig
AgeCommit message (Expand)AuthorLines
2026-02-04Merge branch 'for-7.0/cxl-prm-translation' into cxl-for-nextDave Jiang-0/+5
2026-02-04cxl: Enable AMD Zen5 address translation using ACPI PRMTRobert Richter-0/+5
2026-01-23Merge branch 'for-7.0/cxl-init' into cxl-for-nextDave Jiang-1/+1
2026-01-22PCI/AER: Replace PCIEAER_CXL symbol with CXL_RASDan Williams-1/+1
2026-01-22cxl/pci: Remove CXL VH handling in CONFIG_PCIEAER_CXL conditional blocks from...Dave Jiang-0/+4
2026-01-05cxl/mem: Arrange for always-synchronous memdev attachDan Williams-1/+1
2025-05-23cxl/edac: Support for finding memory operation attributes from the current bootShiju Jose-0/+21
2025-05-23cxl/edac: Add CXL memory device ECS control featureShiju Jose-0/+17
2025-05-23cxl/edac: Add CXL memory device patrol scrub control featureShiju Jose-0/+33
2025-04-02Merge tag 'cxl-for-6.15' of git://git.kernel.org/pub/scm/linux/kernel/git/cxl...Linus Torvalds-0/+4
2025-03-17cxl: Add FWCTL support to CXLDave Jiang-0/+1
2025-03-17Merge branch 'for-6.15/features' into cxl-for-nextDave Jiang-0/+11
2025-02-26cxl: Add mce notifier to emit aliased address for extended linear cacheDave Jiang-0/+4
2025-02-26cxl: Add Get Supported Features command for kernel usageDave Jiang-0/+11
2024-10-25cxl/port: Fix CXL port initialization order when the subsystem is built-inDan Williams-0/+1
2024-09-03mm: make range-to-target_node lookup facility a part of numa_memblksMike Rapoport (Microsoft)-1/+1
2024-04-30cxl: Fix use of phys_to_target_node() for x86Robert Richter-0/+1
2024-03-27cxl: remove CONFIG_CXL_PMU entry in drivers/cxl/KconfigMasahiro Yamada-13/+0
2023-12-22cxl: Add callback to parse the DSMAS subtables from CDATDave Jiang-0/+3
2023-07-14cxl: fix CONFIG_FW_LOADER dependencyArnd Bergmann-1/+2
2023-06-25Merge branch 'for-6.5/cxl-perf' into for-6.5/cxlDan Williams-0/+13
2023-06-25perf: CXL Performance Monitoring Unit driverJonathan Cameron-0/+13
2023-06-25cxl: add a firmware update mechanism using the sysfs firmware loaderVishal Verma-0/+1
2023-02-10Merge branch 'for-6.3/cxl-ram-region' into cxl/nextDan Williams-1/+11
2023-02-10cxl/region: Enable CONFIG_CXL_REGION to be toggledDan Williams-1/+11
2023-01-26cxl: fix spelling mistakesRandy Dunlap-1/+1
2022-12-03cxl/region: Manage CPU caches relative to DPA invalidation eventsDan Williams-0/+18
2022-07-25cxl/region: Allocate HPA capacity to regionsDan Williams-0/+3
2022-07-21cxl/region: Add region creation supportBen Widawsky-0/+5
2022-07-19cxl/pci: Create PCI DOE mailbox's for memory devicesIra Weiny-0/+1
2022-04-22PM: CXL: Disable suspendDan Williams-0/+4
2022-02-08cxl/mem: Add the cxl_mem driverBen Widawsky-0/+16
2022-02-08cxl/port: Add a driver for 'struct cxl_port' objectsBen Widawsky-0/+5
2022-02-08cxl: Rename CXL_MEM to CXL_PCIBen Widawsky-11/+12
2021-11-15cxl/acpi: Convert CFMWS parsing to ACPI sub-table helpersDan Williams-0/+1
2021-06-15cxl/pmem: Add initial infrastructure for pmem supportDan Williams-0/+13
2021-06-09cxl/Kconfig: Default drivers to CONFIG_CXL_BUSDan Williams-0/+2
2021-06-09cxl/acpi: Introduce the root of a cxl_port topologyDan Williams-0/+15
2021-05-26cxl: Rename mem to pciBen Widawsky-9/+4
2021-02-16cxl/mem: Add a "RAW" send commandBen Widawsky-0/+18
2021-02-16cxl/mem: Introduce a driver for CXL-2.0-Type-3 endpointsDan Williams-0/+35
generated by cgit v1.2.3 (git 2.46.0) at 2026-03-31 15:25:03 +0000