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path: root/drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
AgeCommit message (Expand)AuthorLines
2020-08-06drm/amdgpu: fix PSP autoload twice in FLRLiu ChengZhe-1/+3
2020-07-15drm/amd/display: add DC support for navy flounderBhawanpreet Lakha-0/+1
2020-07-15drm/amdgpu: set asic family and ip blocks for navy_flounderJiansong Chen-0/+1
2020-07-15drm/amdgpu: add navy_flounder gpu info firmwareJiansong Chen-0/+4
2020-07-15drm/amdgpu: add navy_flounder asic typeJiansong Chen-0/+1
2020-07-15drm/amdgpu: RAS emergency restart logic refineWenhui Sheng-11/+12
2020-07-10drm/amdgpu: minor cleanup of phase1 suspend codeNirmoy Das-10/+13
2020-07-10drm/amdgpu: enable gpu recovery for sienna cichlidLikun Gao-0/+1
2020-07-02Revert "drm/amdgpu: support access regs outside of mmio bar"Hawking Zhang-17/+28
2020-07-02drm/amdgpu: make IB test synchronize with init for SRIOV(v2)Monk Liu-0/+3
2020-07-02drm/amdgpu: merge atombios init blockWenhui Sheng-22/+1
2020-07-02drm/amdgpu: invoke req full access early enoughWenhui Sheng-31/+23
2020-07-01drm/amdgpu: call release_firmware() without a NULL checkNirmoy Das-4/+2
2020-07-01drm/amdgpu: restrict the hw sched jobs number to power of twoKevin Wang-0/+10
2020-07-01drm/amd: correct trivial kernel-doc inconsistenciesColton Lewis-2/+0
2020-07-01drm/amdgpu: skip BAR resizing if the bios already did itAlex Deucher-0/+5
2020-07-01drm/amdgpu: support reserve bad page for virt (v3)Stanley.Yang-0/+3
2020-07-01drm/amdgpu: temporarily read bounding box from gpu_info fw for navi12Tianci.Yin-1/+15
2020-07-01drm/amdgpu/dc: Add missing Sienna_Cichlid chip idJerry (Fangzhi) Zuo-0/+3
2020-06-03drm/amdgpu: set asic family and ip blocks for sienna_cichlidLikun Gao-0/+1
2020-06-03drm/amdgpu: add sienna_cichlid gpu info firmware v2Likun Gao-1/+5
2020-06-03drm/amdgpu: add sienna_cichlid asic typeLikun Gao-0/+1
2020-05-29drm/amdgpu: clean up discovery testingAlex Deucher-2/+2
2020-05-29drm/amdgpu: skip gpu_info firmware if discovery info is availableAlex Deucher-7/+6
2020-05-29drm/amdgpu: added a sysfs interface for thermal throttling related V4Evan Quan-0/+11
2020-05-28drm/amdgpu: put some case statments in family orderAlex Deucher-27/+27
2020-05-28drm/amdgpu: simplify CZ/ST and KV/KB/ML checksAlex Deucher-4/+4
2020-05-28drm/amdgpu: simplify raven and renoir checksAlex Deucher-2/+1
2020-05-22drm/amdgpu: add apu flags (v2)Alex Deucher-2/+2
2020-05-22drm/amdgpu: move gpu_info parsing after common early initAlex Deucher-4/+4
2020-05-22drm/amdgpu: move discovery gfx config fetchingAlex Deucher-4/+3
2020-05-18drm/amdgpu: Add autodump debugfs node for gpu reset v8Jiange Zhao-0/+2
2020-05-08drm/amdgpu: cleanup sysfs file handlingNirmoy Das-24/+12
2020-05-06drm/amdgpu: use the BAR if possible in amdgpu_device_vram_access v2Christian König-0/+26
2020-05-05drm/amdgpu: Avoid integer overflow in amdgpu_device_suspend_display_audioNathan Chancellor-1/+1
2020-04-30drm/amdgpu: put the audio codec into suspend state before gpu reset V3Evan Quan-0/+75
2020-04-28drm/amdgpu: implement TMZ accessor (v3)Luben Tuikov-2/+1
2020-04-28drm/amdgpu: add function to check tmz capability (v4)Huang Rui-0/+3
2020-04-27drm/amdgpu: remove conversion to bool in amdgpu_device.cJason Yan-1/+1
2020-04-27drm/amdgpu: drop redundant cg/pg ungate on runpm enterEvan Quan-3/+0
2020-04-27drm/amdgpu: move kfd suspend after ip_suspend_phase1Evan Quan-2/+2
2020-04-22drm/amdgpu: set error query ready after all IPs late initDennis Li-0/+2
2020-04-22drm/amdgpu: code cleanup around gpu resetEvan Quan-10/+4
2020-04-22drm/amdgpu: optimize the gpu reset for XGMI setup V2Evan Quan-51/+25
2020-04-22drm/amdgpu: correct cancel_delayed_work_sync on gpu resetEvan Quan-0/+2
2020-04-22drm/amdgpu: correct fbdev suspend on gpu resetEvan Quan-1/+1
2020-04-22drm/amdgpu: clean up unused variable about ring lruKevin Wang-3/+0
2020-04-22drm/amdgpu: Print CU information by default during initializationYong Zhao-1/+2
2020-04-22drm/amdgpu: fix race between pstate and remote buffer mapJonathan Kim-1/+2
2020-04-22Revert "drm/amdgpu: use the BAR if possible in amdgpu_device_vram_access v2"Kent Russell-26/+0
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