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2025-11-04drm/amdgpu/smu: Handle S0ix for vangoghAlex Deucher2-0/+9
Fix the flows for S0ix. There is no need to stop rlc or reintialize PMFW in S0ix. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4659 Reviewed-by: Mario Limonciello <mario.limonciello@amd.com> Reported-by: Antheas Kapenekakis <lkml@antheas.dev> Tested-by: Antheas Kapenekakis <lkml@antheas.dev> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit fd39b5a5830d8f2553e0c09d4d50bdff28b10080) Cc: <stable@vger.kernel.org> # c81f5cebe849: drm/amdgpu: Drop PMFW RLC notifier from amdgpu_device_suspend() Cc: <stable@vger.kernel.org>
2025-10-28drm/amd/pm: fix smu table id bound check issue in smu_cmn_update_table()Yang Wang1-1/+1
'table_index' is a variable defined by the smu driver (kmd) 'table_id' is a variable defined by the hw smu (pmfw) This code should use table_index as a bounds check. Fixes: caad2613dc4bd ("drm/amd/powerplay: move table setting common code to smu_cmn.c") Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com> (cherry picked from commit fca0c66b22303de0d1d6313059baf4dc960a4753)
2025-10-07drm/amd/pm: Disable VCN queue reset on SMU v13.0.6 due to regressionJesse.Zhang1-2/+1
Disable VCN reset capability for the program 4 as it's causing regressions. Fixes: 9d20f37a106f ("drm/amd/pm: Add VCN reset support for SMU v13.0.6") Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Jesse Zhang <jesse.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-10-07drm/amd/pm: Avoid interface mismatch messagingLijo Lazar3-2/+5
PMFW interface version is not used by some IP implementations like SMU v13.0.6/12, instead rely on PMFW version checks. Avoid the log if interface version is not used. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-23drm/amd/pm: Add VCN reset message support for SMU v13.0.12Jesse.Zhang3-1/+6
This commit adds support for VCN reset functionality in SMU v13.0.12 by: 1. Adding two new PPSMC messages in smu_v13_0_12_ppsmc.h: - PPSMC_MSG_ResetVCN (0x5E) - Updates PPSMC_Message_Count to 0x5F to account for new messages 2. Adding message mapping for ResetVCN in smu_v13_0_12_ppt.c: - Maps SMU_MSG_ResetVCN to PPSMC_MSG_ResetVCN These changes enable proper VCN reset handling through the SMU firmware interface for compatible AMD GPUs. v2: Added fw version check to support vcn queue reset. Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Sonny Jiang <sonny.jiang@amd.com> Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-23drm/amd/pm: place the smu 13.0.0 pptable header into the correct folderYang Wang1-0/+198
Place the smu 13.0.0 pptable header in the correct folder Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Mangesh Gadre <mangesh.gadre@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-18drm/amd/pm: Enable npm metrics dataAsad Kamal1-2/+4
Enable npm metrics data for smu_v13_0_12 v3: Add node id check for setting NPM_CAPS (Lijo) Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-18drm/amd/pm: Fetch npm data from system metrics tableAsad Kamal3-0/+61
Fetch npm data from system metrics table for smu_v13_0_12 v3: Remove intermittent type for npm data, remove node id check, move npm caps check to npm_get_data function (Lijo) Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-18drm/amd/pm: Allow system metrics table in 1vf modeAsad Kamal2-1/+3
Allow fetching system metrics table in 1VF mode Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-16drm/amd/pm: Update pmfw headers for smu_v13_0_12Asad Kamal1-2/+10
Update pmfw headers for smu_v13_0_12 to include node power limit Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-16drm/amd: Only restore cached manual clock settings in restore if OD enabledMario Limonciello1-1/+1
If OD is not enabled then restoring cached clock settings doesn't make sense and actually leads to errors in resume. Check if enabled before restoring settings. Fixes: 4e9526924d09 ("drm/amd: Restore cached manual clock settings during resume") Reported-by: Jérôme Lécuyer <jerome.4a4c@gmail.com> Closes: https://lore.kernel.org/amd-gfx/0ffe2692-7bfa-4821-856e-dd0f18e2c32b@amd.com/T/#me6db8ddb192626360c462b7570ed7eba0c6c9733 Suggested-by: Jérôme Lécuyer <jerome.4a4c@gmail.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-16drm/amd/pm: Use devm_i2c_add_adapter() in the V14_0_2 smuRodrigo Siqueira1-17/+2
The I2C init for V14_0_2 uses i2c_add_adapter() and i2c_del_adapter(), this commit replaces the use of these two functions with devm_i2c_add_adapter(). Notice that V14_0_2 init initializes multiple I2C buses in a loop; if something goes wrong, the previous adapters are removed, and the amdgpu load is interrupted. Since I2C init is required for the correct load of amdgpu, it is safe to rely on devm_i2c_add_adapter() to handle any previously initialized I2C adapter. Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-16drm/amd/pm: Use devm_i2c_add_adapter() in the V13_0_6 smuRodrigo Siqueira1-17/+2
The I2C init for V13_0_6 uses i2c_add_adapter() and i2c_del_adapter(), this commit replaces the use of these two functions with devm_i2c_add_adapter(). Notice that V13_0_6 init initializes multiple I2C buses in a loop; if something goes wrong, the previous adapters are removed, and the amdgpu load is interrupted. Since I2C init is required for the correct load of amdgpu, it is safe to rely on devm_i2c_add_adapter() to handle any previously initialized I2C adapter. Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-16drm/amd/pm: Use devm_i2c_add_adapter() in the V13 smuRodrigo Siqueira1-17/+2
The I2C init for SMU_V13 uses i2c_add_adapter() and i2c_del_adapter(), this commit replaces the use of these two functions with devm_i2c_add_adapter(). Notice that SMU_V13 init initializes multiple I2C buses in a loop; if something goes wrong, the previous adapters are removed, and the amdgpu load is interrupted. Since I2C init is required for the correct load of amdgpu, it is safe to rely on devm_i2c_add_adapter() to handle any previously initialized I2C adapter. Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-16drm/amd/pm: Use devm_i2c_add_adapter() in the Sienna smuRodrigo Siqueira1-17/+2
The I2C init for Sienna Cichlid uses i2c_add_adapter() and i2c_del_adapter(), this commit replaces the use of these two functions with devm_i2c_add_adapter(). Notice that Sienna Cichlid init initializes multiple I2C buses in a loop; if something goes wrong, the previous adapters are removed, and the amdgpu load is interrupted. Since I2C init is required for the correct load of amdgpu, it is safe to rely on devm_i2c_add_adapter() to handle any previously initialized I2C adapter. Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-16drm/amd/pm: Use devm_i2c_add_adapter() in the Navi10 smuRodrigo Siqueira1-17/+2
The I2C init for Navi10 uses i2c_add_adapter() and i2c_del_adapter(), this commit replaces the use of these two functions with devm_i2c_add_adapter(). Notice that Navi10 init initializes multiple I2C buses in a loop; if something goes wrong, the previous adapters are removed, and the amdgpu load is interrupted. Since I2C init is required for the correct load of amdgpu, it is safe to rely on devm_i2c_add_adapter() to handle any previously initialized I2C adapter. Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-16drm/amd/pm: Use devm_i2c_add_adapter() in the Arcturus smuRodrigo Siqueira1-17/+2
The I2C init for Arcturus uses i2c_add_adapter() and i2c_del_adapter(), this commit replaces the use of these two functions with devm_i2c_add_adapter(). Notice that Arcturus init initializes multiple I2C buses in a loop; if something goes wrong, the previous adapters are removed, and the amdgpu load is interrupted. Since I2C init is required for the correct load of amdgpu, it is safe to rely on devm_i2c_add_adapter() to handle any previously initialized I2C adapter. Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-16drm/amd/pm: Use devm_i2c_add_adapter() in the i2c initRodrigo Siqueira1-13/+2
Instead of using i2c_add_adapter() and i2c_del_adapter(), replace them with devm_i2c_add_adapter() to simplify the i2c logic. Signed-off-by: Rodrigo Siqueira <siqueira@igalia.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-15drm/amd: Drop unnecessary calls to smu_dpm_set_vpe_enable()Mario Limonciello (AMD)1-2/+0
smu_hw_init() and smu_hw_fini() call smu_dpm_set_vpe_enable() for APUs as part of startup and teardown. These calls however are not necessary because vpe_hw_init()/vpe_hw_fini() will call at init/fini: ``` vpe_hw_init() / vpe_hw_fini() amdgpu_device_ip_set_powergating_state() vpe_set_powergating_state() amdgpu_dpm_enable_vpe() amdgpu_dpm_set_powergating_by_smu() smu_dpm_set_power_gate() smu_dpm_set_vpe_enable() ``` Drop the extra calls. Signed-off-by: Mario Limonciello (AMD) <superm1@kernel.org> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-15drm/amd/pm: unified smu feature cap for vcn resetYang Wang3-11/+5
unified vcn reset smu feature cap Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-15drm/amd/pm: unified smu feature cap for sdma resetYang Wang3-11/+5
unified sdma reset smu feature cap Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-15drm/amd/pm: unified smu feature cap for link resetYang Wang3-12/+11
unified link reset smu feature cap Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-15drm/amd/pm: unified smu feature cap interfaceYang Wang2-0/+41
add a unified interface to provide smu feature cap set. Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-15drm/amd/pm: Allow to set power cap in vf modeAsad Kamal1-1/+5
Allow setting power cap for smu_v13_0_6 in 1vf mode Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-15drm/amd/pm: make smu_set_temp_funcs() smu specific for smu v13.0.6Yang Wang3-7/+7
move smu_set_temp_funcs() into smu_v13.0.6 ppt.c file to keep same code layer in amdgpu_smu.c. (only set_ppt func in amdgpu_smu.c) Signed-off-by: Yang Wang <kevinyang.wang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-05drm/amd/pm: Add caching for SystemMetrics tableLijo Lazar4-13/+36
Implement caching separately for SystemMetrics table from PMFW. The same table could be used for multiple interfaces. Hence, cache it internally to avoid multiple queries to the firmware. For SystemMetrics table, 5ms cache interval is sufficient. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-09-05drm/amd/pm: use int type to store negative error codesQianfeng Rong1-1/+1
Use int instead of uint32_t for 'ret' variable to store negative error codes or zero returned by other functions. Storing the negative error codes in unsigned type, doesn't cause an issue at runtime but can be confusing. Additionally, assigning negative error codes to unsigned type may trigger a GCC warning when the -Wsign-conversion flag is enabled. No effect on runtime. Signed-off-by: Qianfeng Rong <rongqianfeng@vivo.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-29drm/amd/pm: Make use of __free for cleanupLijo Lazar1-38/+25
Use __free(kfree) for memory alloc cleanups in SMUv13.0.6 Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-27drm/amd/pm: Update SMU v13.0.6 PPT caps initializationJesse.Zhang1-1/+4
Update the conditions for setting the SMU vcn reset caps in the SMU v13.0.6 PPT initialization function. Specifically: - Add support for VCN reset capability for firmware versions 0x00558200 and above when the program version is 0. - Add support for VCN reset capability for firmware versions 0x05551800 and above when the program version is 5. v2: correct the smu mp1 version for program 5 (Lijo) Suggested-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com> Acked-by: Alex Deucher <alexander.deucher@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-27drm/amdgpu: Add support for dpc to the productCe Sun1-1/+1
Add support for dpc to the product Signed-off-by: Ce Sun <cesun102@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-27drm/amdgpu: Add support for dpc to a series of productsCe Sun1-1/+1
Add support for dpc to a series of products Signed-off-by: Ce Sun <cesun102@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-15drm/amdgpu/swm14: Update power limit logicAlex Deucher1-5/+25
Take into account the limits from the vbios. Ported from the SMU13 code. Closes: https://gitlab.freedesktop.org/drm/amd/-/issues/4352 Reviewed-by: Jesse Zhang <Jesse.Zhang@amd.com> Reviewed-by: Kenneth Feng <kenneth.feng@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-15drm/amd/pm: Free SMUv13.0.6 resources on failureLijo Lazar2-3/+13
Free the resources allocated if smu_v13_0_12_tables_init fails. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com> Fixes: 5bf93e1d6efd ("drm/amd/pm: Add caching to SMUv13.0.12 temp metric") Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-15drm/amd/pm: Add VCN reset support for SMU v13.0.6Jesse.Zhang3-2/+12
This commit implements VCN reset capability for SMU v13.0.6 with the following changes: 1. Added new PPSMC message ID (0x5B) for VCN reset in SMU firmware interface 2. Extended SMU capabilities to include VCN_RESET support 3. Implemented VCN reset support check: - Added smu_v13_0_6_reset_vcn_is_supported() function 4. Updated SMU v13.0.6 PPT functions to include VCN reset operations v2: clean up debug info (Alex) v3: remove unsupported message and split smu v13.0.6 changes to a separate patch (Lijo) v4: simply the function (smu_v13_0_6_reset_vcn_is_supported) (Lijo) Suggested-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Ruili Ji <ruiliji2@amd.com> Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-15drm/amd/pm: Add VCN reset support check capabilityJesse.Zhang2-0/+15
This change introduces infrastructure to check whether VCN reset is supported by the SMU firmware. Key changes include: 1. Added new functions to query VCN reset support: - amdgpu_dpm_reset_vcn_is_supported() - smu_reset_vcn_is_supported() - pptable_funcs.reset_vcn_is_supported callback 2. Implemented proper locking in the DPM layer with mutex protection 3. Maintained consistency with existing SDMA reset support checks The new capability allows callers to check for VCN reset support before attempting the operation, preventing unnecessary attempts on unsupported platforms. v2: clean up debug info(Alex) Suggested-by: Alex Deucher <alexander.deucher@amd.com> Signed-off-by: Ruili Ji <ruiliji2@amd.com> Signed-off-by: Jesse Zhang <Jesse.Zhang@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-06drm/amd/pm: Add unique ids for SMUv13.0.12 SOCsLijo Lazar1-1/+17
Fetch and store the unique ids for AIDs/XCDs in SMUv13.0.12 SOCs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-06drm/amd/pm: Add caching to SMUv13.0.12 temp metricLijo Lazar3-24/+79
Add table caching logic to temperature metrics tables in SMUv13.0.12 Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-06drm/amd/pm: Add cache logic for temperature metricLijo Lazar2-2/+94
Add caching logic for baseboard and gpuboard temperature metrics tables. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-06drm/amd/pm: Remove cache logic from SMUv13.0.12Lijo Lazar1-19/+11
Remove caching logic of temperature metrics from SMUv13.0.12. The caching logic needs to be moved to a higher level. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-06drm/amd/pm: Add unique ids for SMUv13.0.6 SOCsLijo Lazar1-1/+18
Fetch and store the unique ids for AIDs/XCDs in SMUv13.0.6 SOCs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-06drm/amd/pm: Enable temperature metrics capsAsad Kamal1-0/+5
Enable temperature metrics caps for smu_v13_0_12 Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-06drm/amd/pm: Fetch and fill temperature metricsAsad Kamal7-2/+287
Fetch system metrics table to fill gpuboard/baseboard temperature metrics data for smu_v13_0_12 v2: Remove unnecessary checks, used separate metrics time for temperature metrics table(Lijo) v3: Use cached values for back to back system metrics query(Lijo) Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-06drm/amd/pm: Update pmfw header for smu_v13_0_12Asad Kamal2-2/+78
Update pmfw header for smu_v13_0_12 with system temperature metrics table Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-06drm/amd/pm: Add smu interface for temp metricsAsad Kamal2-0/+56
Add smu interface to get baseboard/gpuboard temperature metrics v2: Rename is_support to is_supported(Lijo) Signed-off-by: Asad Kamal <asad.kamal@amd.com> Reviewed-by: Lijo Lazar <lijo.lazar@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-06drm/amd/pm: Add priority messages for SMU v13.0.6Lijo Lazar4-7/+12
Certain messages will processed with high priority by PMFW even if it hasn't responded to a previous message. Send the priority message regardless of the success/fail status of the previous message. Add support on SMUv13.0.6 and SMUv13.0.12 Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-04drm/amd/pm: Make static table support conditionalLijo Lazar1-7/+21
Add PMFW version check for static table support on SMU v13.0.6 VFs. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Yang Wang <kevinyang.wang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-04drm/amd/pm: Allow static metrics table query in VFLijo Lazar1-1/+1
Allow statics metrics table to be queried on SMUv13.0.6 SOCs in VF mode. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-04drm/amd/pm: Use cached metrics data on arcturusLijo Lazar1-1/+1
Cached metrics data validity is 1ms on arcturus. It's not reasonable for any client to query gpu_metrics at a faster rate and constantly interrupt PMFW. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-04drm/amd/pm: Use cached metrics data on aldebaranLijo Lazar1-1/+1
Cached metrics data validity is 1ms on aldebaran. It's not reasonable for any client to query gpu_metrics at a faster rate and constantly interrupt PMFW. Signed-off-by: Lijo Lazar <lijo.lazar@amd.com> Reviewed-by: Asad Kamal <asad.kamal@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2025-08-04drm/amd: Restore cached manual clock settings during resumeMario Limonciello1-0/+10
If the SCLK limits have been set before S3 they will not be restored. The limits are however cached in the driver and so they can be restored by running a commit sequence during resume. Acked-by: Alex Deucher <alexander.deucher@amd.com> Link: https://lore.kernel.org/r/20250725031222.3015095-3-superm1@kernel.org Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-12-12 21:17:51 +0000