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2025-10-28drm/i915/dmc: Clear HRR EVT_CTL/HTP to zero on ADL-SVille Syrjälä1-1/+54
On ADL-S the main DMC HRR event DMC_EVT_CTL/HTP are never restored to their previous values during DC6 exit. This angers assert_dmc_loaded(), and basically makes the HRR handler unusable because we don't rewrite EVT_HTP when enabling DMC events. Let's just clear the HRR EVT_CTL/HTP to zero from the beginnning so that the expected value matches the post-DC6 reality. I suppose if we ever had actual use for HRR we'd have to both, reject HRR+PSR, and reprogram EVT_HTP when enabling the event. But for now we don't care about HRR so keeping both registers zeroed is fine. Cc: stable@vger.kernel.org Tested-by: Petr Vorel <pvorel@suse.cz> Fixes: 43175c92d403 ("drm/i915/dmc: Assert DMC is loaded harder") Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/15153 Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20251022100718.24803-2-ville.syrjala@linux.intel.com Reviewed-by: Petr Vorel <pvorel@suse.cz> Reviewed-by: Imre Deak <imre.deak@intel.com> Tested-by: Imre Deak <imre.deak@intel.com> (cherry picked from commit 4df3b340ff6e9f499735d8b52b96a9257fde3918) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-10-20drm/i915/panic: fix panic structure allocation memory leakJani Nikula1-12/+13
Separating the panic allocation from framebuffer allocation in commit 729c5f7ffa83 ("drm/{i915,xe}/panic: move framebuffer allocation where it belongs") failed to deallocate the panic structure anywhere. The fix is two-fold. First, free the panic structure in intel_user_framebuffer_destroy() in the general case. Second, move the panic allocation later to intel_framebuffer_init() to not leak the panic structure in error paths (if any, now or later) between intel_framebuffer_alloc() and intel_framebuffer_init(). v2: Rebase Fixes: 729c5f7ffa83 ("drm/{i915,xe}/panic: move framebuffer allocation where it belongs") Cc: Jocelyn Falempe <jfalempe@redhat.com> Cc: Maarten Lankhorst <dev@lankhorst.se> Reported-by: Michał Grzelak <michal.grzelak@intel.com> Suggested-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Tested-by: Michał Grzelak <michal.grzelak@intel.com> # v1 Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://lore.kernel.org/r/20251015095135.2183415-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com> (cherry picked from commit 8f8ef09fcf6a3b00369bfc704e8f68d7474eca94) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-10-15drm/i915/psr: Deactivate PSR only on LNL and when selective fetch enabledJouni Högander1-2/+10
Using intel_psr_exit in frontbuffer flush on older platforms seems to be causing problems. Sending single full frame update using intel_psr_force_update is anyways more optimal compared to psr deactivate/activate -> move back to this approach on PSR1, PSR HW tracking and Panel Replay full frame update and use deactivate/activate only on LunarLake and only when selective fetch is enabled. Tested-by: Lemen <lemen@lemen.xyz> Tested-by: Koos Vriezen <koos.vriezen@gmail.com> Closes: https://gitlab.freedesktop.org/drm/i915/kernel/-/issues/14946 Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://lore.kernel.org/r/20250922102725.2752742-1-jouni.hogander@intel.com (cherry picked from commit 924adb0bbdd8fef25fd229c76e3f602c3e8752ee) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-10-13drm/i915/fb: Fix the set_tiling vs. addfb race, againVille Syrjälä1-18/+20
intel_frontbuffer_get() is what locks out subsequent set_tiling changes to the bo. Thus the fence vs. modifier check must be done after intel_frontbuffer_get(), or else a concurrent set_tiling ioctl might sneak in and change the fence after the check has been done. Close the race again. See commit dd689287b977 ("drm/i915: Prevent concurrent tiling/framebuffer modifications") for the previous instance. v2: Reorder intel_user_framebuffer_destroy() to match the unwind (Jani) Cc: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Fixes: 10690b8a49bc ("drm/i915/display: Add intel_fb_bo_framebuffer_fini") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20251003145734.7634-3-ville.syrjala@linux.intel.com (cherry picked from commit 1d1e4ded216017f8febd91332ee337f0e0e79285) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-10-13drm/i915/frontbuffer: Move bo refcounting intel_frontbuffer_{get,release}()Ville Syrjälä1-1/+9
Currently xe's intel_frontbuffer implementation forgets to hold a reference on the bo. This makes the entire thing extremely fragile as the cleanup order now depends on bo references held by other things (namely intel_fb_bo_framebuffer_fini()). Move the bo refcounting to intel_frontbuffer_{get,release}() so that both i915 and xe do this the same way. I first tried to fix this by having xe do the refcounting from its intel_bo_set_frontbuffer() implementation (which is what i915 does currently), but turns out xe's drm_gem_object_free() can sleep and thus drm_gem_object_put() isn't safe to call while we hold fb_tracking.lock. Fixes: 10690b8a49bc ("drm/i915/display: Add intel_fb_bo_framebuffer_fini") Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20251003145734.7634-2-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com> (cherry picked from commit eb4d490729a5fd8dc5a76d334f8d01fec7c14bbe) Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-10-02Merge tag 'drm-next-2025-10-01' of https://gitlab.freedesktop.org/drm/kernelLinus Torvalds99-1140/+1808
Pull drm updates from Dave Airlie: "cross-subsystem: - i2c-hid: Make elan touch controllers power on after panel is enabled - dt bindings for STM32MP25 SoC - pci vgaarb: use screen_info helpers - rust pin-init updates - add MEI driver for late binding firmware update/load uapi: - add ioctl for reassigning GEM handles - provide boot_display attribute on boot-up devices core: - document DRM_MODE_PAGE_FLIP_EVENT - add vendor specific recovery method to drm device wedged uevent gem: - Simplify gpuvm locking ttm: - add interface to populate buffers sched: - Fix race condition in trace code atomic: - Reallow no-op async page flips display: - dp: Fix command length video: - Improve pixel-format handling for struct screen_info rust: - drop Opaque<> from ioctl args - Alloc: - BorrowedPage type and AsPageIter traits - Implement Vmalloc::to_page() and VmallocPageIter - DMA/Scatterlist: - Add dma::DataDirection and type alias for dma_addr_t - Abstraction for struct scatterlist and sg_table - DRM: - simplify use of generics - add DriverFile type alias - drop Object::SIZE - Rust: - pin-init tree merge - Various methods for AsBytes and FromBytes traits gpuvm: - Support madvice in Xe driver gpusvm: - fix hmm_pfn_to_map_order usage in gpusvm bridge: - Improve and fix ref counting on bridge management - cdns-dsi: Various improvements to mode setting - Support Solomon SSD2825 plus DT bindings - Support Waveshare DSI2DPI plus DT bindings - Support Content Protection property - display-connector: Improve DP display detection - Add support for Radxa Ra620 plus DT bindings - adv7511: Provide SPD and HDMI infoframes - it6505: Replace crypto_shash with sha() - synopsys: Add support for DW DPTX Controller plus DT bindings - adv7511: Write full Audio infoframe - ite6263: Support vendor-specific infoframes - simple: Add support for Realtek RTD2171 DP-to-HDMI plus DT bindings panel: - panel-edp: Support mt8189 Chromebooks; Support BOE NV140WUM-N64; Support SHP LQ134Z1; Fixes - panel-simple: Support Olimex LCD-OLinuXino-5CTS plus DT bindings - Support Samsung AMS561RA01 - Support Hydis HV101HD1 plus DT bindings - ilitek-ili9881c: Refactor mode setting; Add support for Bestar BSD1218-A101KL68 LCD plus DT bindings - lvds: Add support for Ampire AMP19201200B5TZQW-T03 to DT bindings - edp: Add support for additonal mt8189 Chromebook panels - lvds: Add DT bindings for EDT ETML0700Z8DHA amdgpu: - add CRIU support for gem objects - RAS updates - VCN SRAM load fixes - EDID read fixes - eDP ALPM support - Documentation updates - Rework PTE flag generation - DCE6 fixes - VCN devcoredump cleanup - MMHUB client id fixes - VCN 5.0.1 RAS support - SMU 13.0.x updates - Expanded PCIe DPC support - Expanded VCN reset support - VPE per queue reset support - give kernel jobs unique id for tracing - pre-populate exported buffers - cyan skillfish updates - make vbios build number available in sysfs - userq updates - HDCP updates - support MMIO remap page as ttm pool - JPEG parser updates - DCE6 DC updates - use devm for i2c buses - GPUVM locking updates - Drop non-DC DCE11 code - improve fallback handling for pixel encoding amdkfd: - SVM/page migration fixes - debugfs fixes - add CRIO support for gem objects - SVM updates radeon: - use dev_warn_once in CS parsers xe: - add madvise interface - add DRM_IOCTL_XE_VM_QUERY_MEMORY_RANGE_ATTRS to query VMA count and memory attributes - drop L# bank mask reporting from media GT3 on Xe3+. - add SLPC power_profile sysfs interface - add configs attribs to add post/mid context-switch commands - handle firmware reported hardware errors notifying userspace with device wedged uevent - use same dir structure across sysfs/debugfs - cleanup and future proof vram region init - add G-states and PCI link states to debugfs - Add SRIOV support for CCS surfaces on Xe2+ - Enable SRIOV PF mode by default on supported platforms - move flush to common code - extended core workarounds for Xe2/3 - use DRM scheduler for delayed GT TLB invalidations - configs improvements and allow VF device enablement - prep work to expose mmio regions to userspace - VF migration support added - prepare GPU SVM for THP migration - start fixing XE_PAGE_SIZE vs PAGE_SIZE - add PSMI support for hw validation - resize VF bars to max possible size according to number of VFs - Ensure GT is in C0 during resume - pre-populate exported buffers - replace xe_hmm with gpusvm - add more SVM GT stats to debugfs - improve fake pci and WA kunnit handle for new platform testing - Test GuC to GuC comms to add debugging - use attribute groups to simplify sysfs registration - add Late Binding firmware code to interact with MEI i915: - apply multiple JSL/EHL/Gen7/Gen6 workarounds properly - protect against overflow in active_engine() - Use try_cmpxchg64() in __active_lookup() - include GuC registers in error state - get rid of dev->struct_mutex - iopoll: generalize read_poll_timout - lots more display refactoring - Reject HBR3 in any eDP Panel - Prune modes for YUV420 - Display Wa fix, additions, and updates - DP: Fix 2.7 Gbps link training on g4x - DP: Adjust the idle pattern handling - DP: Shuffle the link training code a bit - Don't set/read the DSI C clock divider on GLK - Enable_psr kernel parameter changes - Type-C enabled/disconnected dp-alt sink - Wildcat Lake enabling - DP HDR updates - DRAM detection - wait PSR idle on dsb commit - Remove FBC modulo 4 restriction for ADL-P+ - panic: refactor framebuffer allocation habanalabs: - debug/visibility improvements - vmalloc-backed coherent mmap support - HLDIO infrastructure nova-core: - various register!() macro improvements - minor vbios/firmware fixes/refactoring - advance firmware boot stages; process Booter and patch signatures - process GSP and GSP bootloader - Add r570.144 firmware bindings and update to it - Move GSP boot code to own module - Use new pin-init features to store driver's private data in a single allocation - Update ARef import from sync::aref nova-drm: - Update ARef import from sync::aref tyr: - initial driver skeleton for a rust driver for ARM Mali GPUs - capable of powering up, query metadata and provide it to userspace. msm: - GPU and Core: - in DT bindings describe clocks per GPU type - GMU bandwidth voting for x1-85 - a623/a663 speedbins - cleanup some remaining no-iommu leftovers after VM_BIND conversion - fix GEM obj 32b size truncation - add missing VM_BIND param validation - IFPC for x1-85 and a750 - register xml and gen_header.py sync from mesa - Display: - add missing bindings for display on SC8180X - added DisplayPort MST bindings - conversion from round_rate() to determine_rate() amdxdna: - add IOCTL_AMDXDNA_GET_ARRAY - support user space allocated buffers - streamline PM interfaces - Refactoring wrt. hardware contexts - improve error reporting nouveau: - use GSP firmware by default - improve error reporting - Pre-populate exported buffers ast: - Clean up detection of DRAM config exynos: - add DSIM bridge driver support for Exynos7870 - Document Exynos7870 DSIM compatible in dt-binding panthor: - Print task/pid on errors - Add support for Mali G710, G510, G310, Gx15, Gx20, Gx25 - Improve cache flushing - Fail VM bind if BO has offset renesas: - convert to RUNTIME_PM_OPS rcar-du: - Make number of lanes configurable - Use RUNTIME_PM_OPS - Add support for DSI commands rocket: - Add driver for Rockchip NPU plus DT bindings - Use kfree() and sizeof() correctly - Test DMA status rockchip: - dsi2: Add support for RK3576 plus DT bindings - Add support for RK3588 DPTX output tidss: - Use crtc_ fields for programming display mode - Remove other drivers from aperture pixpaper: - Add support for Mayqueen Pixpaper plus DT bindings v3d: - Support querying nubmer of GPU resets for KHR_robustness stm: - Clean up logging - ltdc: Add support support for STM32MP257F-EV1 plus DT bindings sitronix: - st7571-i2c: Add support for inverted displays and 2-bit grayscale tidss: - Convert to kernel's FIELD_ macros vesadrm: - Support 8-bit palette mode imagination: - Improve power management - Add support for TH1520 GPU - Support Risc-V architectures v3d: - Improve job management and locking vkms: - Support variants of ARGB8888, ARGB16161616, RGB565, RGB888 and P01x - Spport YUV with 16-bit components" * tag 'drm-next-2025-10-01' of https://gitlab.freedesktop.org/drm/kernel: (1455 commits) drm/amd: Add name to modes from amdgpu_connector_add_common_modes() drm/amd: Drop some common modes from amdgpu_connector_add_common_modes() drm/amdgpu: update MODULE_PARM_DESC for freesync_video drm/amd: Use dynamic array size declaration for amdgpu_connector_add_common_modes() drm/amd/display: Share dce100_validate_global with DCE6-8 drm/amd/display: Share dce100_validate_bandwidth with DCE6-8 drm/amdgpu: Fix fence signaling race condition in userqueue amd/amdkfd: enhance kfd process check in switch partition amd/amdkfd: resolve a race in amdgpu_amdkfd_device_fini_sw drm/amd/display: Reject modes with too high pixel clock on DCE6-10 drm/amd: Drop unnecessary check in amdgpu_connector_add_common_modes() drm/amd/display: Only enable common modes for eDP and LVDS drm/amdgpu: remove the redeclaration of variable i drm/amdgpu/userq: assign an error code for invalid userq va drm/amdgpu: revert "rework reserved VMID handling" v2 drm/amdgpu: remove leftover from enforcing isolation by VMID drm/amdgpu: Add fallback to pipe reset if KCQ ring reset fails accel/habanalabs: add Infineon version check accel/habanalabs/gaudi2: read preboot status after recovering from dirty state accel/habanalabs: add HL_GET_P_STATE passthrough type ...
2025-09-23drm/i915/ddi: Guard reg_val against a INVALID_TRANSCODERSuraj Kandpal1-2/+3
Currently we check if the encoder is INVALID or -1 and throw a WARN_ON but we still end up writing the temp value which will overflow and corrupt the whole programmed value. --v2 -Assign a bogus transcoder to master in case we get a INVALID TRANSCODER [Jani] Fixes: 6671c367a9bea ("drm/i915/tgl: Select master transcoder for MST stream") Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Link: https://lore.kernel.org/r/20250908042208.1011144-1-suraj.kandpal@intel.com (cherry picked from commit c8e8e9ab14a6ea926641d161768e1e3ef286a853) Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net>
2025-09-16drm/i915/backlight: Honor VESA eDP backlight luminance control capabilityAaron Ma1-1/+1
The VESA AUX backlight fails to be enable luminance based backlight mainpulation becaused luminance_set is false by default. Fix it by using luminance support control capabitliy. Fixes: e13af5166a359 ("drm/i915/backlight: Use drm helper to initialize edp backlight") Signed-off-by: Aaron Ma <aaron.ma@canonical.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://lore.kernel.org/r/20250823121647.275834-1-aaron.ma@canonical.com (cherry picked from commit 72136efb875d8438c20b9c8ab72945d474933471) Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net>
2025-09-11drm/i915/backlight: Honor VESA eDP backlight luminance control capabilityAaron Ma1-1/+1
The VESA AUX backlight fails to be enable luminance based backlight mainpulation becaused luminance_set is false by default. Fix it by using luminance support control capabitliy. Fixes: e13af5166a359 ("drm/i915/backlight: Use drm helper to initialize edp backlight") Signed-off-by: Aaron Ma <aaron.ma@canonical.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Link: https://lore.kernel.org/r/20250823121647.275834-1-aaron.ma@canonical.com
2025-09-10Merge drm/drm-next into drm-intel-nextRodrigo Vivi5-103/+73
Catching up with some display dependencies. Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-09-09drm/i915/display: Remove outdated struct_mutex commentsLuiz Otavio Mello1-5/+1
The struct_mutex will be removed from the DRM subsystem, as it was a legacy BKL that was only used by i915 driver. After review, it was concluded that its usage was no longer necessary This patch update a comment about struct_mutex in i915/display, in order to prevent future misunderstandings. * intel_fbc.c: Removed the statement that intel_fbc->lock is the inner lock when overlapping with struct_mutex, since struct_mutex is no longer used anywhere in the driver. Signed-off-by: Luiz Otavio Mello <luiz.mello@estudante.ufscar.br> Reviewed-by: Rodrigo Vivi <rodrigo.vivi@intel.com> Link: https://lore.kernel.org/r/20250908131518.36625-7-luiz.mello@estudante.ufscar.br Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
2025-09-09drm/i915/power: fix size for for_each_set_bit() in abox iterationJani Nikula1-3/+3
for_each_set_bit() expects size to be in bits, not bytes. The abox mask iteration uses bytes, but it works by coincidence, because the local variable holding the mask is unsigned long, and the mask only ever has bit 2 as the highest bit. Using a smaller type could lead to subtle and very hard to track bugs. Fixes: 62afef2811e4 ("drm/i915/rkl: RKL uses ABOX0 for pixel transfers") Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: stable@vger.kernel.org # v5.9+ Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://lore.kernel.org/r/20250905104149.1144751-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com> (cherry picked from commit 7ea3baa6efe4bb93d11e1c0e6528b1468d7debf6) Signed-off-by: Tvrtko Ursulin <tursulin@ursulin.net>
2025-09-09drm/i915/display: add intel_display_device_present()Jani Nikula2-0/+6
Add a proper function for display && HAS_DISPLAY(display) to hide indirect struct intel_display access via the macro from a number of places outside of display. This makes struct intel_display * an opaque pointer in these places. All HAS_DISPLAY() usage is now constrained within display. Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://lore.kernel.org/r/20250903090408.3492875-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-09drm/i915/backlight: Disable backlight when using luminance controlSuraj Kandpal1-3/+0
We just return when using luminance control instead we should be calling the disable helper to get everything cleaned up properly by default. Signed-off-by: Suraj Kandpal <suraj.kandpal@intel.com> Reviewed-by: Arun R Murthy <arun.r.murthy@intel.com> Link: https://lore.kernel.org/r/20250904044804.948391-1-suraj.kandpal@intel.com
2025-09-08drm/i915: rename range_overflows_end() to range_end_overflows()Jani Nikula1-2/+2
Rename range_overflows_end() to range_end_overflows(), along with the _t variant. It's all rather subjective, but I think range_end_overflows() reads better. Cc: Kees Cook <kees@kernel.org> Cc: "Gustavo A. R. Silva" <gustavoars@kernel.org> Cc: linux-hardening@vger.kernel.org Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/20250829174601.2163064-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-08drm/{i915,xe}/panic: pass struct intel_panic to intel_panic_setup()Jani Nikula3-4/+11
Reduce the struct intel_framebuffer usage within the panic implementation. Cc: Jocelyn Falempe <jfalempe@redhat.com> Cc: Maarten Lankhorst <dev@lankhorst.se> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://lore.kernel.org/r/2a016167b1f6f0b432aed0a630f9dbcd07fadb7b.1756835342.git.jani.nikula@intel.com
2025-09-08drm/{i915,xe}/panic: convert intel_panic_finish() to struct intel_panicJani Nikula3-5/+4
The intel_panic_finish() function really needs the struct intel_panic pointer, not struct intel_framebuffer. Make it so. Cc: Jocelyn Falempe <jfalempe@redhat.com> Cc: Maarten Lankhorst <dev@lankhorst.se> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://lore.kernel.org/r/3fdbcbe17e0e90c4a590f2a2486a9ec79a90cf62.1756835342.git.jani.nikula@intel.com
2025-09-08drm/{i915,xe}/panic: move framebuffer allocation where it belongsJani Nikula3-4/+20
The struct intel_framebuffer allocation naturally belongs in intel_fb.c, not hidden inside panic implementation. Separate the panic allocation. Drop the unnecessary struct i915_framebuffer and struct xe_framebuffer types. Cc: Jocelyn Falempe <jfalempe@redhat.com> Cc: Maarten Lankhorst <dev@lankhorst.se> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://lore.kernel.org/r/d29f63e0118d002fc8edd368caea7e8185418e17.1756835342.git.jani.nikula@intel.com
2025-09-08drm/{i915,xe}/panic: rename struct {i915,xe}_panic_data to struct intel_panicJani Nikula1-1/+2
Prepare for better shared interfaces between panic implementations. The struct intel_panic remains an opaque data type, with unique implementations in i915 and xe. This allows us to change the panic data pointer from void * to struct intel_panic *, helping type safety. Cc: Jocelyn Falempe <jfalempe@redhat.com> Cc: Maarten Lankhorst <dev@lankhorst.se> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://lore.kernel.org/r/884ffc80c8b5fef1b92956e644a4e559560cc2ba.1756835342.git.jani.nikula@intel.com
2025-09-08drm/{i915,xe}/fb: add panic pointer member to struct intel_framebufferJani Nikula1-0/+1
Add a panic data pointer member in struct intel_framebuffer in preparation for breaking the artificial subclassing between intel_framebuffer and panic structures. Cc: Jocelyn Falempe <jfalempe@redhat.com> Cc: Maarten Lankhorst <dev@lankhorst.se> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://lore.kernel.org/r/41f42e1de8545409274d54854aa12e0fb390e394.1756835342.git.jani.nikula@intel.com
2025-09-08drm/{i915,xe}/panic: rename intel_bo_panic_*() to intel_panic_*()Jani Nikula3-6/+6
Rename the intel_bo_panic_*() functions according to the functionality, dropping the misleading intel_bo reference. Keep intel_bo_alloc_framebuffer() for now; it'll be refactored later. Cc: Jocelyn Falempe <jfalempe@redhat.com> Cc: Maarten Lankhorst <dev@lankhorst.se> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://lore.kernel.org/r/a3be8f8b5e7dd208027a1131e89452d9a214054f.1756835342.git.jani.nikula@intel.com
2025-09-08drm/{i915,xe}/panic: split out intel_panic.[ch]Jani Nikula8-19/+38
intel_bo.[ch] is not the appropriate location for the panic functionality. Split out intel_panic.[ch] and xe_panic.c in i915 and xe. Keep the function names for now. Cc: Jocelyn Falempe <jfalempe@redhat.com> Cc: Maarten Lankhorst <dev@lankhorst.se> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://lore.kernel.org/r/d98b831a011a028ffd33ce99b0ba62be061ee235.1756835342.git.jani.nikula@intel.com
2025-09-08drm/i915/fb: add intel_framebuffer_alloc()Jani Nikula4-4/+11
Add intel_framebuffer_alloc() to hide intel_bo_alloc_framebuffer(), as that doesn't feel like the correct abstraction. Cc: Jocelyn Falempe <jfalempe@redhat.com> Cc: Maarten Lankhorst <dev@lankhorst.se> Signed-off-by: Jani Nikula <jani.nikula@intel.com> Reviewed-by: Jocelyn Falempe <jfalempe@redhat.com> Link: https://lore.kernel.org/r/379c306c692c50f6af3b6f2488c213f12627954f.1756835342.git.jani.nikula@intel.com
2025-09-08drm/i915/display: Remove FBC modulo 4 restriction for ADL-P+Uma Shankar1-2/+2
WA:22010751166 does not apply past display version 12. Or, in other words, the FBC restriction where FBC is disabled for non-modulo 4 plane sizes (including plane size + yoffset) is fixed from display version 13 and onwards. Relax the restriction for the same. v4: Dropped redundant commit message v3: Update comments for clarity (Jonathan Cavitt) v2: Update the macro for display version check (Vinod) Suggested-by: Vidya Srinivas <vidya.srinivas@intel.com> Signed-off-by: Uma Shankar <uma.shankar@intel.com> Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Reviewed-by: Jonathan Cavitt <jonathan.cavitt@intel.com> Link: https://lore.kernel.org/r/20250904095338.300813-2-uma.shankar@intel.com
2025-09-08drm/i915/ddi: abstract figuring out encoder nameJani Nikula1-31/+38
The encoder name deduction has become a bit cumbersome within intel_ddi_init(). Split it out to a separate function to declutter intel_ddi_init(), even if that means having to use a temp seq buffer for the name. Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Link: https://lore.kernel.org/r/20250903101050.3671305-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-08drm/i915/power: fix size for for_each_set_bit() in abox iterationJani Nikula1-3/+3
for_each_set_bit() expects size to be in bits, not bytes. The abox mask iteration uses bytes, but it works by coincidence, because the local variable holding the mask is unsigned long, and the mask only ever has bit 2 as the highest bit. Using a smaller type could lead to subtle and very hard to track bugs. Fixes: 62afef2811e4 ("drm/i915/rkl: RKL uses ABOX0 for pixel transfers") Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Matt Roper <matthew.d.roper@intel.com> Cc: stable@vger.kernel.org # v5.9+ Reviewed-by: Matt Roper <matthew.d.roper@intel.com> Link: https://lore.kernel.org/r/20250905104149.1144751-1-jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-08drm/i915/psr: Panel Replay SU cap dpcd read return valueJouni Högander1-5/+7
Currently return value of drm_dpcd_readb is not checked when reading sink Panel Replay Selective Update capabilities. Fix this and switch to drm_dpcd_read_byte. Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Reviewed-by: Michał Grzelak <michal.grzelak@intel.com> Link: https://lore.kernel.org/r/20250827060809.2461725-1-jouni.hogander@intel.com
2025-09-08drm/i915/psr: Add poll for checking PSR is idle before starting updateJouni Högander1-0/+3
We are currently observing crc failures after we started using dsb for PSR updates as well. This seems to happen because PSR HW is still sending couple of updates using old framebuffers on wake-up. Fix this by adding poll ensuring PSR is idle before starting update. v2: pass new_crtc_state->dsb_commit to intel_psr_wait_for_idle_dsb Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://lore.kernel.org/r/20250905072708.2659411-5-jouni.hogander@intel.com
2025-09-08drm/i915/psr: New interface adding PSR idle poll into dsb commitJouni Högander2-4/+37
We are currently observing crc failures after we started using dsb for PSR updates as well. This seems to happen because PSR HW is still sending couple of updates using old framebuffers on wake-up. This patch is preparing to fix that by adding interface which can be used to add poll ensuring PSR HW is idle into dsb commit. v3: add intel_dsb as a parameter to intel_psr_wait_for_idle_dsb v2: add pass crtc_state->dsb_commit as parameter Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://lore.kernel.org/r/20250905072708.2659411-4-jouni.hogander@intel.com
2025-09-08drm/i915/psr: Add new define for PSR idle timeoutJouni Högander1-8/+12
Currently we are using value 50ms as timeout for waiting PSR to idle. Add own define for this purpose. Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://lore.kernel.org/r/20250905072708.2659411-3-jouni.hogander@intel.com
2025-09-08drm/i915/psr: Pass intel_crtc_state instead of intel_dp in wait_for_idleJouni Högander1-8/+10
This is preparation to add own function for polling PSR being ready for update when doing dsb commit. Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Mika Kahola <mika.kahola@intel.com> Link: https://lore.kernel.org/r/20250905072708.2659411-2-jouni.hogander@intel.com
2025-09-05drm/i915/display: Avoid divide by zeroJuha-Pekka Heikkila1-1/+1
skl_crtc_allocate_plane_ddb allow iter.data_rate to be zero which could cause divide by zero in skl_allocate_plane_ddb, check against that. Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Signed-off-by: Mika Kahola <mika.kahola@intel.com> Link: https://lore.kernel.org/r/20250905104626.1274147-3-juhapekka.heikkila@gmail.com
2025-09-05drm/i915/display: log fail from intel_sdvo_enable_hotplugJuha-Pekka Heikkila1-2/+4
Report in log if intel_sdvo_enable_hotplug failed Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> Reviewed-by: Suraj Kandpal <suraj.kandpal@intel.com> Signed-off-by: Mika Kahola <mika.kahola@intel.com> Link: https://lore.kernel.org/r/20250905104626.1274147-2-juhapekka.heikkila@gmail.com
2025-09-05drm/i915/display: take out dead codeJuha-Pekka Heikkila1-2/+0
if __waitfor timeout, ret will have -ETIMEDOUT. Then if condition was met, and read_ret will have error that's handled. Then if ret was zero, read_ret was zero ksv_ready must have value. Signed-off-by: Juha-Pekka Heikkila <juhapekka.heikkila@gmail.com> Reviewed-by: Jani Nikula <jani.nikula@intel.com> Signed-off-by: Mika Kahola <mika.kahola@intel.com> Link: https://lore.kernel.org/r/20250905104626.1274147-1-juhapekka.heikkila@gmail.com
2025-09-05drm/i915/dram: Fix some spelling around the 16Gb DIMM w/aVille Syrjälä1-2/+2
Use consistent spelling when talking about the 16Gb DIMM w/a. Even currently language is a bit off as the w/a is actually about DIMMs with 16Gb DRAM devices on them, not the total capacity of the whole DIMM. But this language does more or less match how Bspec talks about this stuff. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-7-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2025-09-05drm/i915/dram: s/wm_lv0.../has_16gb_dimms/Ville Syrjälä1-1/+1
The DRAM code shouldn't know anything about watermarks. Rename wm_lv_0_adjust_needed to has_16gb_dimms. How this gets used is up to the watermark code. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-5-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2025-09-05drm/i915/dram: Use intel_dram_type_str() for pnvVille Syrjälä1-2/+3
Replace the hand rolled PNV memory type printk string stuff with intel_dram_type_str(). Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250902133113.18778-3-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2025-09-05drm/i915/hpd: Fix mtp_tc_hpd_enable_detection()Ville Syrjälä1-1/+1
Set the MTP TC hotplug bits in the correct register. Shouldn't matter really as this only gets used for eDP detection and there should be never eDP on TC ports on current hw. Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20250902153915.4423-1-ville.syrjala@linux.intel.com Reviewed-by: Jani Nikula <jani.nikula@intel.com>
2025-09-05drm/i915/display: Remove power state verification before HW readoutImre Deak1-2/+0
During system resume the display power state verification will print the "power well x state mismatch (refcount 0/enabled 1)" error message from the early resume sequence for a power well left enabled by BIOS. This power well was probably left enabled by BIOS inadvertently, since BIOS versions on current platforms do not leave any display output enabled while resuming from an Sx power state, hence the enabled display power well is unused. In theory however it is possible that BIOS leaves a display output enabled, in that case the enabled power well shouldn't be reported as an error. According to the above, remove the display power state verification from the early resume phase to avoid incorrectly reporting an enabled power well without a power reference as an error. Note: The refcount for any enabled and used power well (i.e. used for an enabled display output) will be acquired following the early resume sequence, after the HW state for display outputs (encoder/crtc etc.) is read out. Any power well enabled but not used (hence not holding a reference) will be disabled after the HW state readout. The display power state will be verified afterwards in intel_power_domains_enable(). Closes: https://gitlab.freedesktop.org/drm/xe/kernel/-/issues/6012 Reviewed-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Imre Deak <imre.deak@intel.com> Link: https://lore.kernel.org/r/20250903122152.2526050-1-imre.deak@intel.com
2025-09-05drm/i915/alpm: Use actual lfps cycle and silence periods in wake timeJouni Högander1-7/+5
Currently we are using maximum lfps cycle and silence period times when calculating AUXLess wake time. Use actual values instead. Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://lore.kernel.org/r/20250829053929.3585636-5-jouni.hogander@intel.com
2025-09-05drm/i915/alpm: Replace hardcoded LFPS cycle with proper calculationJouni Högander1-52/+38
Currently LFPS is hadcoded for different port clocks. Replace this with proper calculation. v2: replace hardcoded 20 with 2 * LFPS_CYCLE_COUNT Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://lore.kernel.org/r/20250829053929.3585636-4-jouni.hogander@intel.com
2025-09-05drm/i915/alpm: Add own define for LFPS countJouni Högander1-1/+3
Add own define for LFPS count and use it for the configuration. This new define will be used for calculating ALPM parameters as well. Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://lore.kernel.org/r/20250829053929.3585636-3-jouni.hogander@intel.com
2025-09-05drm/i915/alpm: Calculate silence periodJouni Högander1-20/+17
Calculate silence period instead of hardcoding it in switch case. Signed-off-by: Jouni Högander <jouni.hogander@intel.com> Reviewed-by: Animesh Manna <animesh.manna@intel.com> Link: https://lore.kernel.org/r/20250829053929.3585636-2-jouni.hogander@intel.com
2025-09-04drm/i915/pps: prefer poll_timeout_us() over read_poll_timeout()Jani Nikula1-5/+3
Unify on using poll_timeout_us() throughout instead of mixing with readx_poll_timeout(). Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/260fd455df743453f123d96fc01e7ca96a36f0fa.1756383233.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-04drm/i915/ddi: prefer poll_timeout_us() over readx_poll_timeout()Jani Nikula1-21/+11
Unify on using poll_timeout_us() throughout instead of mixing with readx_poll_timeout(). While the latter can be ever so slightly simpler, they are both complicated enough that it's better to unify on one approach only. While at it, better separate the handling of error returns from drm_dp_dpcd_readb() and the actual status byte. This is best achieved by inlining the read_fec_detected_status() function, and switching to drm_dp_dpcd_read_byte(). v2: Use drm_dp_dpcd_read_byte() (Imre) Cc: Imre Deak <imre.deak@intel.com> Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/63b10a36c7ab545c640b24bc8fc007ce2ea74623.1756383233.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-04drm/i915/opregion: use generic poll_timeout_us() instead of wait_for()Jani Nikula1-4/+6
Prefer generic poll helpers over i915 custom helpers. The functional change is losing the exponentially growing sleep of wait_for(), which used to be 10, 20, 40, ..., 640, and 1280 us. Use an arbitrary constant 1 ms sleep instead. The timeout remains, being opregion defined, 50 ms by default, and 1500 ms at most. Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/63db3a1e1db9e55a18ed322c55f2dffe511a10bb.1756383233.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-04drm/i915/lspcon: use generic poll_timeout_us() instead of wait_for()Jani Nikula1-3/+10
Prefer generic poll helpers over i915 custom helpers. The functional change is losing the exponentially growing sleep of wait_for(), which used to be 10, 20, 40, ..., 640, and 1280 us. Use an arbitrary constant 5 ms sleep instead. The timeouts remain, being 400 ms or 800 ms, depending on the case. Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/4065fa96c0ef6afd51a384f365761d2ca802256b.1756383233.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-04drm/i915/dsb: use generic poll_timeout_us() instead of wait_for()Jani Nikula1-2/+8
Prefer generic poll helpers over i915 custom helpers. The functional change is losing the exponentially growing sleep of wait_for(), which used to be 10, 20, 40, ..., 640, and 1280 us. Use an arbitrary constant 100 us sleep instead. The timeout remains at 1 ms. Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/979eae02af1184b3756746ace61379dd1947a79b.1756383233.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-04drm/i915/tc: use generic poll_timeout_us() instead of wait_for()Jani Nikula1-2/+14
Prefer generic poll helpers over i915 custom helpers. The functional change is losing the exponentially growing sleep of wait_for(), which used to be 10, 20, 40, ..., 640, and 1280 us. Use an arbitrary constant 200 us sleep for the 5 ms timeout, and 1000 us sleep for the 500 ms timeout. The timeouts remain the same. Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/50cd06b61210f541d5bb52a36af2d8bf059dd3a1.1756383233.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
2025-09-04drm/i915/vblank: use generic poll_timeout_us() instead of wait_for()Jani Nikula1-1/+8
Prefer generic poll helpers over i915 custom helpers. The functional change is losing the exponentially growing sleep of wait_for(), which used to be 10, 20, 40, ..., 640, and 1280 us. Use an arbitrary constant 500 us sleep instead. The timeout remains at 100 ms. Reviewed-by: Jouni Högander <jouni.hogander@intel.com> Link: https://lore.kernel.org/r/162dff5862d3213304491a6d2eb31a57346b523e.1756383233.git.jani.nikula@intel.com Signed-off-by: Jani Nikula <jani.nikula@intel.com>
generated by cgit v1.2.3 (git 2.39.1) at 2025-12-13 23:08:45 +0000