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path: root/drivers/gpu/drm/tegra/dsi.c
AgeCommit message (Expand)AuthorLines
2015-01-27drm/tegra: dc: Unify enabling the display controllerThierry Reding-10/+0
2015-01-27drm/tegra: Remove unused ->mode_fixup() callbacksThierry Reding-87/+0
2015-01-27drm/tegra: dsi: Implement ->atomic_check()Thierry Reding-73/+196
2015-01-27drm/tegra: Atomic conversion, phase 2Thierry Reding-0/+2
2015-01-27drm/tegra: Atomic conversion, phase 1Thierry Reding-0/+2
2015-01-27drm/tegra: Output cleanup functions cannot failThierry Reding-5/+1
2015-01-27drm/tegra: Remove remnants of the output midlayerThierry Reding-4/+8
2015-01-27drm/tegra: debugfs cleanup cannot failThierry Reding-9/+3
2015-01-27drm/tegra: dsi: DemidlayerThierry Reding-163/+195
2015-01-27drm/tegra: Stop CRTC at CRTC disable timeThierry Reding-4/+0
2015-01-27drm/tegra: Use tegra_commit_dc() in output driversThierry Reding-4/+2
2015-01-27drm/tegra: dsi: Reset across ->exit()/->init()Thierry Reding-13/+14
2015-01-27drm/tegra: dsi: Soft-reset controller on ->disableThierry Reding-0/+25
2015-01-27drm/tegra: dsi: Registers are 32-bitThierry Reding-7/+7
2014-11-13drm/tegra: dsi: Set up PHY_TIMING & BTA_TIMING registers earlierSean Paul-4/+7
2014-11-13drm/tegra: dsi: Replace 1000000 by USEC_PER_SECThierry Reding-1/+1
2014-11-13drm/tegra: dsi: Replace 1000000000UL by NSEC_PER_SECThierry Reding-1/+1
2014-11-13drm/tegra: dsi: Implement host transfersThierry Reding-0/+267
2014-11-13drm/tegra: dsi: Add ganged mode supportThierry Reding-29/+192
2014-11-13drm/tegra: dsi: Split out tegra_dsi_set_timeout()Thierry Reding-15/+23
2014-11-13drm/tegra: dsi: Add command mode supportThierry Reding-19/+63
2014-11-13drm/tegra: dsi: Refactor in preparation for command modeThierry Reding-19/+81
2014-11-13drm/tegra: dsi: Properly cleanup on probe failureThierry Reding-15/+37
2014-11-13drm/tegra: dsi: Mark connector hotpluggableThierry Reding-2/+4
2014-11-13drm/tegra: dsi: Leave parent clock aloneThierry Reding-7/+0
2014-11-13drm/tegra: dsi: Do not manage clock on enable/disableThierry Reding-15/+14
2014-11-13drm/tegra: dsi: Make FIFO depths host parametersThierry Reding-4/+6
2014-08-04drm/tegra: add MODULE_DEVICE_TABLEsStephen Warren-0/+1
2014-08-04drm/tegra: dsi - Handle non-continuous clock flagAlexandre Courbot-1/+2
2014-06-05drm/tegra: Remove host1x drm_bus implementationThierry Reding-3/+3
2014-06-05drm/tegra: dsi - Do not needlessly recompute pclkThierry Reding-1/+0
2014-06-05drm/tegra: dc - Compute shift clock divider in output driversThierry Reding-12/+31
2014-06-05drm/tegra: dsi - Reset controller on driver unloadThierry Reding-0/+1
2014-06-05drm/tegra: dsi - Fix typo when disabling controllerThierry Reding-1/+1
2014-06-05drm/tegra: dsi - Add enable guardThierry Reding-0/+11
2014-06-05drm/tegra: dsi - Initialize proper packet sequencesThierry Reding-4/+46
2014-06-05drm/tegra: dsi - Implement VDD supply supportThierry Reding-0/+17
2014-06-05drm/tegra: dsi - Remove unneeded codeThierry Reding-85/+0
2014-06-05drm/tegra: dsi - Use internal pixel formatThierry Reding-1/+33
2014-04-04drm/tegra: Relicense under GPL v2Thierry Reding-17/+3
2013-12-20drm/tegra: Relocate some output-specific codeThierry Reding-7/+15
2013-12-20drm/tegra: Fix return value checkWei Yongjun-2/+2
2013-12-20drm/tegra: Add DSI supportThierry Reding-0/+963
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