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| author | Curtis Malainey <cujomalainey@chromium.org> | 2019-11-05 17:13:36 -0800 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2019-11-11 13:02:07 +0000 |
| commit | 9da776ba7852f9b5cbfdfaa80a1dc07cda592b55 (patch) | |
| tree | e1617b697854165c7bf4c82d06f006c018c8fe82 /tools/perf/scripts/python/stackcollapse.py | |
| parent | ASoC: rt5677: Set ADC clock to use PLL and enable ASRC (diff) | |
| download | linux-9da776ba7852f9b5cbfdfaa80a1dc07cda592b55.tar.gz linux-9da776ba7852f9b5cbfdfaa80a1dc07cda592b55.zip | |
ASoC: rt5677: Wait for DSP to boot before loading firmware
Wait for hardware to startup. If we load before hardware is ready we
could end up corrupting the firmware.
Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
Link: https://lore.kernel.org/r/20191106011335.223061-12-cujomalainey@chromium.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'tools/perf/scripts/python/stackcollapse.py')
0 files changed, 0 insertions, 0 deletions